[PATCH 7/8] ARM: Add hwcap for Speculation Barrier(SB)
Amit Daniel Kachhap
amit.kachhap at arm.com
Tue Oct 25 22:50:00 PDT 2022
Speculation Barrier(FEAT_SB) is a feature present in AArch32 state for
Armv8 and is represented by ISAR6.SB identification register.
This feature denotes the presence of SB instruction and hence adding a
hwcap will enable the userspace to check it before trying to use this
instruction.
This commit adds the ID feature bit detection, and uses elf_hwcap2
accordingly.
Signed-off-by: Amit Daniel Kachhap <amit.kachhap at arm.com>
---
arch/arm/include/uapi/asm/hwcap.h | 1 +
arch/arm/kernel/setup.c | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
index 46833c668ec2..bc9e7d318e25 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -43,5 +43,6 @@
#define HWCAP2_SHA1 (1 << 2)
#define HWCAP2_SHA2 (1 << 3)
#define HWCAP2_CRC32 (1 << 4)
+#define HWCAP2_SB (1 << 5)
#endif /* _UAPI__ASMARM_HWCAP_H */
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index de2d85ddec8d..f676c54e5d14 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -450,6 +450,7 @@ static void __init cpuid_init_hwcaps(void)
{
int block;
u32 isar5;
+ u32 isar6;
if (cpu_architecture() < CPU_ARCH_ARMv7)
return;
@@ -485,6 +486,12 @@ static void __init cpuid_init_hwcaps(void)
block = cpuid_feature_extract_field(isar5, 16);
if (block >= 1)
elf_hwcap2 |= HWCAP2_CRC32;
+
+ /* Check for Speculation barrier instruction */
+ isar6 = read_cpuid_ext(CPUID_EXT_ISAR6);
+ block = cpuid_feature_extract_field(isar6, 12);
+ if (block >= 1)
+ elf_hwcap2 |= HWCAP2_SB;
}
static void __init elf_hwcap_fixup(void)
@@ -1264,6 +1271,7 @@ static const char *hwcap2_str[] = {
"sha1",
"sha2",
"crc32",
+ "sb",
NULL
};
--
2.17.1
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