[PATCH 5/6] arm: dts: spear600: Add ssp controller nodes

Viresh Kumar viresh.kumar at linaro.org
Wed Oct 19 21:36:32 PDT 2022


On 19-10-22, 15:32, Köry Maincent wrote:
> From: Kory Maincent <kory.maincent at bootlin.com>
> 
> The SPEAr600 has three Synchronous serial port to enables synchronous
> serial communication with slave or master peripherals (SPI). Lets add these
> nodes to be able to use them.
> 
> Signed-off-by: Kory Maincent <kory.maincent at bootlin.com>
> ---
>  arch/arm/boot/dts/spear600.dtsi | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
> index 9d5a04a46b14..6b67c0ceaed9 100644
> --- a/arch/arm/boot/dts/spear600.dtsi
> +++ b/arch/arm/boot/dts/spear600.dtsi
> @@ -207,6 +207,36 @@ adc: adc at d820b000 {
>  				interrupts = <6>;
>  				status = "disabled";
>  			};
> +
> +			ssp1: spi at d0100000 {
> +				compatible = "arm,pl022", "arm,primecell";
> +				reg = <0xd0100000 0x1000>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				interrupt-parent = <&vic0>;
> +				interrupts = <26>;
> +				status = "disabled";
> +			};
> +
> +			ssp2: spi at d0180000 {
> +				compatible = "arm,pl022", "arm,primecell";
> +				reg = <0xd0180000 0x1000>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				interrupt-parent = <&vic0>;
> +				interrupts = <27>;
> +				status = "disabled";
> +			};
> +
> +			ssp3: spi at d8180000 {
> +				compatible = "arm,pl022", "arm,primecell";
> +				reg = <0xd8180000 0x1000>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				interrupt-parent = <&vic1>;
> +				interrupts = <5>;
> +				status = "disabled";
> +			};
>  		};
>  	};
>  };

Acked-by: Viresh Kumar <viresh.kumar at linaro.org>

-- 
viresh



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