[RFC PATCH v3 1/6] dpll: Add DPLL framework base functions

[Jiri Pirko]

Thu, Oct 13, 2022 at 05:17:25PM CEST, kuba at kernel.org wrote:
>On Thu, 13 Oct 2022 08:55:34 +0200 Jiri Pirko wrote:
>>> AFAIU, some mux devices are not smart enough to make a decision suitable for
>>> autoselect for the pins they have. In this case the autoselect process is
>>> done in the DPLL device, which selects mux and not the pin directly. At the
>>> same time there could be muxes that are smart enough to make a decision, and
>>> it will be autoselect on top of autoselect (and several more layers) and it
>>> doesn't sound great to me. I believe Arkadiusz will explain the mux a bit
>>> better.  
>> 
>> From what you write in this reply, I have a feeling that these details
>> are not really interesting for user to see. So I tend to lean forward to
>> abstract this out and leave the details to HW/FW/driver.
>
>Are you saying we don't need to model MUXes?  Topology of the signals
>imposes restrictions on the supported configuration, it's not something
>you can "abstract out in the FW".
>
>My thinking was we can let the user ignore it and have the core figure
>out the configuration of the muxes if users asks for a pin behind a mux.
>But it's better if the mux is visible so that it's clear which signals
>can't be selected simultaneously. (IIRC Arkadiusz may have even had
>muxes shared between DPLLs :S)

Yeah, that sounds fine. My point was, the user does not have to know the
details and muxes could be abstracted out in kernel and below.

Not sure why the mux would need to be visible to user. It it needs to,
sure, lets model it. I have no strong opinion here.


>
>Anyway, I may just be confused about the state of the series because
>most of the points you brought up were already discussed. I guess you
>were right that off-list reviews are a bad idea :(

Yep :/ Let's please move it here to stop the mess.