[PATCH 2/2] arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

[Geert Uytterhoeven]

From: Hai Pham <hai.pham.ud at renesas.com>

Describe the QSPI FLASH on the White Hawk CPU board.

Signed-off-by: Hai Pham <hai.pham.ud at renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
---
 .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi  | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
index b306e5a10794dfb5..bb4dd08781ca275d 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
@@ -232,12 +232,45 @@ mmc_pins: mmc {
 		power-source = <1800>;
 	};
 
+	qspi0_pins: qspi0 {
+		groups = "qspi0_ctrl", "qspi0_data4";
+		function = "qspi0";
+	};
+
 	scif_clk_pins: scif_clk {
 		groups = "scif_clk";
 		function = "scif_clk";
 	};
 };
 
+&rpc {
+	pinctrl-0 = <&qspi0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	flash at 0 {
+		compatible = "spansion,s25fs512s", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+		spi-rx-bus-width = <4>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			boot at 0 {
+				reg = <0x0 0x1200000>;
+				read-only;
+			};
+			user at 1200000 {
+				reg = <0x1200000 0x2e00000>;
+			};
+		};
+	};
+};
+
 &scif_clk {
 	clock-frequency = <24000000>;
 };
-- 
2.25.1