Meaning of commented out dma-coherent in ZynqMP DWC3 DT node (Was: Re: [PATCH] arm64: zynqmp: Enable hs termination flag for USB dwc3 controller)

[Ahmad Fatoum]

Hello!

On 23.10.22 23:56, Michael Grzeschik wrote:
> Since we need to support legacy phys with the dwc3 controller,
> we enable this quirk on the zynqmp platforms.

Slightly off-topic question below.

> 
> Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index a549265e55f6e7..7c1af75f33a05b 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -825,6 +825,7 @@ dwc3_0: usb at fe200000 {
>  				clock-names = "bus_early", "ref";
>  				iommus = <&smmu 0x860>;
>  				snps,quirk-frame-length-adjustment = <0x20>;
> +				snps,resume-hs-terminations;
>  				/* dma-coherent; */

Is it possible to configure coherent DMA for the device and this is currently
not done or how should this comment be interpreted?

Thanks!
Ahmad

>  			};
>  		};
> @@ -851,6 +852,7 @@ dwc3_1: usb at fe300000 {
>  				clock-names = "bus_early", "ref";
>  				iommus = <&smmu 0x861>;
>  				snps,quirk-frame-length-adjustment = <0x20>;
> +				snps,resume-hs-terminations;
>  				/* dma-coherent; */
>  			};
>  		};

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