[PATCH RESEND v2] dt-bindings: pwm: mediatek: Add compatible for MT7986

AngeloGioacchino Del Regno angelogioacchino.delregno at collabora.com
Mon Nov 28 03:25:40 PST 2022


Il 25/11/22 12:34, Daniel Golle ha scritto:
> On Fri, Nov 25, 2022 at 12:12:17PM +0100, AngeloGioacchino Del Regno wrote:
>> Il 24/11/22 12:03, Daniel Golle ha scritto:
>>> Add new compatible string for MT7986 PWM and list compatible units for
>>> existing entries. Also make sure the number of pwm1-X clocks is listed
>>> for all supported units.
>>>
>>> Signed-off-by: Daniel Golle <daniel at makrotopia.org>
>>> ---
>>> Changes since v1: list compatibles, fix pwm1-n clocks for all SoCs
>>>
>>> Rebased on linux-next and re-run scripts/get_maintainers.pl on patch to
>>> makes sure dt maintainers are included. This has been requested by
>>> Krzysztof Kozlowski.
>>>
>>>    .../devicetree/bindings/pwm/pwm-mediatek.txt  | 20 +++++++++++--------
>>>    1 file changed, 12 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
>>> index 554c96b6d0c3..952a338e06e7 100644
>>> --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
>>> +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
>>> @@ -2,14 +2,15 @@ MediaTek PWM controller
>>>    Required properties:
>>>     - compatible: should be "mediatek,<name>-pwm":
>>> -   - "mediatek,mt2712-pwm": found on mt2712 SoC.
>>> +   - "mediatek,mt2712-pwm", "mediatek,mt6795-pwm": found on mt2712 SoC.
>>>       - "mediatek,mt6795-pwm": found on mt6795 SoC.
>>> -   - "mediatek,mt7622-pwm": found on mt7622 SoC.
>>> -   - "mediatek,mt7623-pwm": found on mt7623 SoC.
>>> +   - "mediatek,mt7622-pwm", "mediatek,mt8195-pwm", "mediatek,mt8183-pwm", "mediatek,mt7986-pwm": found on mt7622 SoC.
>>> +   - "mediatek,mt7623-pwm", "mediatek,mt7628-pwm": found on mt7623 SoC.
>>>       - "mediatek,mt7628-pwm": found on mt7628 SoC.
>>>       - "mediatek,mt7629-pwm": found on mt7629 SoC.
>>> -   - "mediatek,mt8183-pwm": found on mt8183 SoC.
>>> -   - "mediatek,mt8195-pwm", "mediatek,mt8183-pwm": found on mt8195 SoC.
>>> +   - "mediatek,mt7986-pwm": found on mt7986 SoC.
>>> +   - "mediatek,mt8183-pwm", "mediatek,mt7986-pwm": found on mt8183 SoC.
>>> +   - "mediatek,mt8195-pwm", "mediatek,mt8183-pwm", "mediatek,mt7986-pwm": found on mt8195 SoC.
>>
>> I'm sorry, but all these compatibles make little sense at best.
>> Each of these PWM controllers have different properties as they may *by hardware*
>> be featuring more or less channels, they may be a different IP revision and/or
>> sub-revision requiring even ever-so-slightly different handling (check pwm45_fixup
>> and has_ck_26m_sel).
> 
> I did check the two pwm45_fixup and has_ck_26m_sel for each supported
> compatible and listed them accordingly.
> Ie. the ones listed as compatible in this submission really only differ
> by the number of channels offered from the driver's point of view and
> share the same boolean values for pwm45_fixup and has_ck_26m_sel.
> 
>>
>> If you want to add MT7986, the best thing that you can do is to simply add
>>
>> +   - "mediatek,mt7986-pwm": found on mt7986 SoC.
>>
>> this line ^
>>
>> ...and then please don't touch the others.
>>
>>>       - "mediatek,mt8365-pwm": found on mt8365 SoC.
>>>       - "mediatek,mt8516-pwm": found on mt8516 SoC.
>>>     - reg: physical base address and length of the controller's registers.
>>> @@ -20,11 +21,14 @@ Required properties:
>>>                    has no clocks
>>>       - "top": the top clock generator
>>>       - "main": clock used by the PWM core
>>> +   - "pwm1"  : the PWM1 clock for mt7629
>>> +   - "pwm1-2": the two per PWM clocks for mt7986
>>
>> That's not your fault, but the binding is already wrong (yes it must be fixed!) and
>> unless my brain is failing somewhere, there's only one clock per pwm (as if there's
>> any children, it must be parented to .. well, its parent, in the clock driver), and
>> note that the driver is actually parsing "pwmX" clocks, never "pwmX-Y" clocks.
>>
>> Relevant snippet:
>>
>> 		char name[8];
>>
>> 		snprintf(name, sizeof(name), "pwm%d", i + 1);
>>
>> 		pc->clk_pwms[i] = devm_clk_get(&pdev->dev, name);
>>
>> Just... please don't keep doing the same mistake that is already inside of here...
> 
> Maybe better to write "pwm1"..."pwm2" or something like that...
> But I just won't bother with it if you are planning to convert this to
> YAML schema anyway.
> 
>>
>> So, coming to an end: I think that this commit should be a one-liner that documents
>> your "mediatek,mt7986-pwm" compatible and that's it.
>>
> 
> This is exactly what I did in the first submission of this patch:
> https://www.spinics.net/lists/devicetree/msg542568.html
> 
> Should I just re-submit this then?
> 
> 
>> A schema conversion would be welcome: in that regard, I can make a conversion
>> and send it next week, along with that clock-names fix.
> 
> Should I wait for you doing that and then re-submit or just re-submit
> immediately?
> 

I'm sorry but I forgot to Cc you on the schema conversion that I've just sent...

Find it here:

https://lore.kernel.org/linux-mediatek/20221128112028.58021-1-angelogioacchino.delregno@collabora.com/

...and yes at this point you should document mt7986 on the new yaml, but
please wait for some feedback on that series before doing anything so that
you won't find yourself rebasing over and over.

Cheers,
Angelo




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