[PATCH] arm64: booting: Require placement within 48-bit addressable memory
Anshuman Khandual
anshuman.khandual at arm.com
Tue Nov 22 22:29:58 PST 2022
On 11/22/22 22:33, Ard Biesheuvel wrote:
> On Tue, 22 Nov 2022 at 18:02, Ard Biesheuvel <ardb at kernel.org> wrote:
>>
>> Some configurations (i.e., 64k + LVA/LPA) can tolerate a physical
>> placement of the kernel image outside of the 48-bit addressable region,
>> but given that the loader has no way of knowing whether or not the image
>> in question supports LVA/LPA, it currently has no choice but to place it
>> below the 48-bit mark.
>>
>> Once we add support for LPA2, which allows 52-bit physical and virtual
>> addressing when using 4k or 16k pages, but in way that relies on
>> increasing the number of paging levels, there will be more variety in
>> the configurations that may or may not support this.
>>
>> So redefine bit #3 in the Image header as 'must be placed within 48-bit
>> addressable memory', as this is the current de facto meaning.
>>
>> Signed-off-by: Ard Biesheuvel <ardb at kernel.org>
>> ---
>
> Note that this is a v2 addressing prior feedback from Mark.
As you had mentioned earlier, currently [64K|52VA|52PA] can boot the vmlinux
loaded beyond 48 bits PA. Why should not the kernel header flags be extended
right away to support mentioned FEAT_LPA config and also let the kernel write
update these extended flags when applicable. Why wait for FEAT_LPA2 ?
>
>> Documentation/arm64/booting.rst | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst
>> index 8c324ad638de2b27..5a764fabfea821f0 100644
>> --- a/Documentation/arm64/booting.rst
>> +++ b/Documentation/arm64/booting.rst
>> @@ -121,8 +121,9 @@ Header notes:
>> to the base of DRAM, since memory below it is not
>> accessible via the linear mapping
>> 1
>> - 2MB aligned base may be anywhere in physical
>> - memory
>> + 2MB aligned base such that all image_size bytes
>> + counted from the start of the image are within
>> + the 48-bit addressable range of physical memory
>> Bits 4-63 Reserved.
>> ============= ===============================================================
>>
>> --
>> 2.35.1
>>
>
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