[PATCHv3 0/9] RK3588 Clock and Reset Support

Qu Wenruo wqu at suse.com
Mon Nov 21 00:52:22 PST 2022



On 2022/10/18 23:13, Sebastian Reichel wrote:
> Hi,
> 
> This has been part of a bigger patchset adding basic rk3588 support.
> Since that gets more and more out of hand, I'm now sending patches
> for each subsystem as individual patchset.

Awesome work! Thanks for the work to bring upstream support for RK3588.

This upstream work is especially important since the vendor kernel has 
so many weird things and is never properly tested using newer tool chains.

But considering the support has been split into different patchset, is 
there a git repo that I can fetch all the patches and test it on my 
Rock5B board?

Thanks,
Qu
> 
> Changes since PATCHv2:
>   * https://lore.kernel.org/all/20220930153857.299396-1-sebastian.reichel@collabora.com/
>   * rebased to v6.1-rc1
>   * define rk3588_rst_init() in clk.h to fix build warning
>   * add input clocks to the binding
>   * add some more rates from the rate table (merged downstream fix)
>   * fix input of mux_700m_400m_200m_24m_p clock (merged downstream fix)
> 
> Changes since PATCHv1:
>   * https://lore.kernel.org/all/20220623160329.239501-1-sebastian.reichel@collabora.com/
>   * split dt-binding header addition into its own patch (requested by Heiko)
>   * split dt-binding header into clock and reset one (requested by Krzysztof)
>   * use reset identifier instead of register offset (requested by Krzysztof)
>    * (involves adding lookup table support to rockchip CRU reset code)
>   * use linear, gapless clock identifier (requested by Krzysztof)
>   * reword the DT binding description
> 
> Changes since PATCHv0:
>   * https://lore.kernel.org/all/20220504213251.264819-1-sebastian.reichel@collabora.com/
>   * Sync'd with latest downstream changes
>   * Update bindings according to Rob's comments, except for license
>     (no feedback from Rockchip)
> 
> -- Sebastian
> 
> Elaine Zhang (5):
>    dt-bindings: clock: add rk3588 cru bindings
>    clk: rockchip: add register offset of the cores select parent
>    clk: rockchip: add pll type for RK3588
>    clk: rockchip: clk-cpu: add mux setting for cpu change frequency
>    clk: rockchip: add clock controller for the RK3588
> 
> Sebastian Reichel (4):
>    dt-bindings: clock: add rk3588 clock definitions
>    dt-bindings: reset: add rk3588 reset definitions
>    clk: rockchip: simplify rockchip_clk_add_lookup
>    clk: rockchip: add lookup table support
> 
>   .../bindings/clock/rockchip,rk3588-cru.yaml   |   71 +
>   drivers/clk/rockchip/Kconfig                  |    8 +
>   drivers/clk/rockchip/Makefile                 |    1 +
>   drivers/clk/rockchip/clk-cpu.c                |   69 +-
>   drivers/clk/rockchip/clk-pll.c                |  218 +-
>   drivers/clk/rockchip/clk-rk3588.c             | 2538 +++++++++++++++++
>   drivers/clk/rockchip/clk.c                    |   14 +-
>   drivers/clk/rockchip/clk.h                    |   95 +-
>   drivers/clk/rockchip/rst-rk3588.c             |  857 ++++++
>   drivers/clk/rockchip/softrst.c                |   34 +-
>   .../dt-bindings/clock/rockchip,rk3588-cru.h   |  766 +++++
>   .../dt-bindings/reset/rockchip,rk3588-cru.h   |  754 +++++
>   12 files changed, 5390 insertions(+), 35 deletions(-)
>   create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml
>   create mode 100644 drivers/clk/rockchip/clk-rk3588.c
>   create mode 100644 drivers/clk/rockchip/rst-rk3588.c
>   create mode 100644 include/dt-bindings/clock/rockchip,rk3588-cru.h
>   create mode 100644 include/dt-bindings/reset/rockchip,rk3588-cru.h
> 



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