[PATCH v5 1/3] dt-bindings: imx6q-pcie: Handle various clock configurations
Serge Semin
fancer.lancer at gmail.com
Wed Nov 16 23:57:45 PST 2022
On Wed, Nov 09, 2022 at 01:24:47AM +0100, Marek Vasut wrote:
> The i.MX SoCs have various clock configurations routed into the PCIe IP,
> the list of clock is below. Document all those configurations in the DT
> binding document.
>
> All SoCs: pcie, pcie_bus
> 6QDL, 7D: + pcie_phy
> 6SX: + pcie_phy pcie_inbound_axi
> 8MQ: + pcie_phy pcie_aux
> 8MM, 8MP: + pcie_aux
This patch does two things at a time:
1. Fixes invalid fourth clock-names entry.
2. Fixes the fsl,imx8mm-pcie/fsl,imx8mp-pcie devices having the
"pcie_aux" clock name required instead of "pcie_phy".
There is a single patch which fixes the only first part of the problem:
Link: https://lore.kernel.org/linux-pci/20221113191301.5526-2-Sergey.Semin@baikalelectronics.ru/
I suggest to consider moving that patch to this series and altering this
patch so one would fix the iMX 8MM/8MP clock names only.
Rob, please note my patchset will fail the dt_binding_check procedure
if that patch is moved from it.
* Please note one nitpick below.
>
> Acked-by: Alexander Stein <alexander.stein at ew.tq-group.com>
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Fabio Estevam <festevam at gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>
> Cc: Lucas Stach <l.stach at pengutronix.de>
> Cc: Richard Zhu <hongxing.zhu at nxp.com>
> Cc: Rob Herring <robh+dt at kernel.org>
> Cc: Shawn Guo <shawnguo at kernel.org>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: NXP Linux Team <linux-imx at nxp.com>
> To: devicetree at vger.kernel.org
> ---
> V2: - Add AB from Alex
> V3: - Duplicate clock-names maxItems to mx6sx and mx8mq compatibles
> - Flatten the if-else structure
> - The validation no longer works and introduces errors like these:
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb: pcie at 33800000: clock-names:2: 'pcie_phy' was expected
> V4: - Reinstate minItems: for clock-names in main section, turn the
> last two clock-names items into enums to cover all IP variants.
> - Add another allOf entry for mx6q/mx6qp/mx7d clock-names list.
> - Adjust clock maxItems in the allOf section.
> V5: - No change
> ---
> .../bindings/pci/fsl,imx6q-pcie.yaml | 73 +++++++++++++++++--
> 1 file changed, 68 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index 376e739bcad40..2df73be0ffbea 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -14,9 +14,6 @@ description: |+
> This PCIe host controller is based on the Synopsys DesignWare PCIe IP
> and thus inherits all the common properties defined in snps,dw-pcie.yaml.
>
> -allOf:
> - - $ref: /schemas/pci/snps,dw-pcie.yaml#
> -
> properties:
> compatible:
> enum:
> @@ -60,8 +57,8 @@ properties:
> items:
> - const: pcie
> - const: pcie_bus
> - - const: pcie_phy
> - - const: pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie
> + - enum: [ pcie_phy, pcie_aux ]
> + - enum: [ pcie_aux, pcie_inbound_axi ]
>
> num-lanes:
> const: 1
> @@ -177,6 +174,72 @@ required:
>
> unevaluatedProperties: false
>
> +allOf:
> + - $ref: /schemas/pci/snps,dw-pcie.yaml#
> +
Unnecessary newline.
-Sergey
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - fsl,imx6q-pcie
> + - fsl,imx6qp-pcie
> + - fsl,imx7d-pcie
> + then:
> + properties:
> + clocks:
> + maxItems: 3
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_phy
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: fsl,imx6sx-pcie
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_phy
> + - const: pcie_inbound_axi
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: fsl,imx8mq-pcie
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_phy
> + - const: pcie_aux
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - fsl,imx8mm-pcie
> + - fsl,imx8mp-pcie
> + then:
> + properties:
> + clocks:
> + maxItems: 3
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_aux
> +
> examples:
> - |
> #include <dt-bindings/clock/imx6qdl-clock.h>
> --
> 2.35.1
>
>
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