[PATCH v4 net-next 0/3] net: axienet: Use a DT property to configure frequency of the MDIO bus
Andy Chiu
andy.chiu at sifive.com
Wed Nov 16 19:47:48 PST 2022
Some FPGA platforms have to set frequency of the MDIO bus lower than 2.5
MHz. Thus, we use a DT property, which is "clock-frequency", to work
with it at boot time. The default 2.5 MHz would be set if the property
is not pressent. Also, factor out mdio enable/disable functions due to
the api change since 253761a0e61b7.
Changelog:
--- v4 ---
1. change MAX_MDIO_FREQ to DEFAULT_MDIO_FREQ as suggested by Andrew.
--- v3 RESEND ---
1. Repost the exact same patch again
--- v3 ---
1. Fix coding style, and make probing of the driver fail if MDC overflow
--- v2 ---
1. Use clock-frequency, as defined in mdio.yaml, to configure MDIO
clock.
2. Only print out frequency if it is set to a non-standard value.
3. Reduce the scope of axienet_mdio_enable and remove
axienet_mdio_disable because no one really uses it anymore.
Andy Chiu (3):
net: axienet: Unexport and remove unused mdio functions
net: axienet: set mdio clock according to bus-frequency
dt-bindings: describe the support of "clock-frequency" in mdio
.../bindings/net/xilinx_axienet.txt | 2 +
drivers/net/ethernet/xilinx/xilinx_axienet.h | 2 -
.../net/ethernet/xilinx/xilinx_axienet_mdio.c | 59 +++++++++++--------
3 files changed, 35 insertions(+), 28 deletions(-)
--
2.36.0
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