[PATCH v3] arm64: dts: ti: k3-j721s2-main: Enable crypto accelerator

[Manorit Chawdhry]

On 01/11/22 01:36, Jayesh Choudhary wrote:
> Add the node for SA2UL for supporting hardware crypto algorithms,
> including SHA1, SHA256, SHA512, AES, 3DES and AEAD suites.
> Add rng node for hardware random number generator.
>
> Signed-off-by: Jayesh Choudhary <j-choudhary at ti.com>
> Acked-by: Matt Ranostay <mranostay at ti.com>
> Acked-by: Andrew Davis <afd at ti.com>
> ---
>
> Changes have been tested on local j721s2-evm board. Tcrypt tests
> and crypto self-tests were passing.
>
> Changelog v2 -> v3:
> - remove the clock property from rng node
>    (<https://lore.kernel.org/all/20220901171041.32056-1-afd@ti.com/>)
>
> Changelog v1 -> v2:
> - change the TI_SCI flag from shared to exclusive as OP-TEE uses MCU
>    domain SA2UL instance and not the main domain instance
> - remove the 'dma-coherent' property (Binding changes are merged)
> - add the rng node which can be used as well for hwrng along with
>    optee-rng
>
> v2 patch: https://lore.kernel.org/all/20221031135416.350010-1-j-choudhary@ti.com/
>
> Testing log: https://gist.github.com/Jayesh2000/26acf0e63f7edcd4b267122e4c73b9a8
>
>   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index d1ec26110376..2e0ba2262e77 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -72,6 +72,25 @@ main_pmx0: pinctrl at 11c000 {
>   		pinctrl-single,function-mask = <0xffffffff>;
>   	};
>   
> +	main_crypto: crypto at 4e00000 {
> +		compatible = "ti,j721e-sa2ul";
> +		reg = <0x00 0x4e00000 0x00 0x1200>;
> +		power-domains = <&k3_pds 297 TI_SCI_PD_EXCLUSIVE>;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges = <0x00 0x04e00000 0x00 0x04e00000 0x00 0x30000>;
> +
> +		dmas = <&main_udmap 0xca40>, <&main_udmap 0x4a40>,
> +				<&main_udmap 0x4a41>;
> +		dma-names = "tx", "rx1", "rx2";
> +
> +		rng: rng at 4e10000 {
> +			compatible = "inside-secure,safexcel-eip76";
> +			reg = <0x0 0x4e10000 0x0 0x7d>;
> +			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +	};
> +

Reviewed-by: Manorit Chawdhry <m-chawdhry at ti.com>

>   	main_uart0: serial at 2800000 {
>   		compatible = "ti,j721e-uart", "ti,am654-uart";
>   		reg = <0x00 0x02800000 0x00 0x200>;