[PATCH v3 11/14] KVM: arm64: PMU: Allow ID_AA64DFR0_EL1.PMUver to be set from userspace
Marc Zyngier
maz at kernel.org
Sun Nov 13 02:21:02 PST 2022
On 2022-11-08 05:38, Reiji Watanabe wrote:
> Hi Marc,
>
> On Mon, Nov 7, 2022 at 1:16 AM Marc Zyngier <maz at kernel.org> wrote:
>>
>> Allow userspace to write ID_AA64DFR0_EL1, on the condition that only
>> the PMUver field can be altered and be at most the one that was
>> initially computed for the guest.
>>
>> Signed-off-by: Marc Zyngier <maz at kernel.org>
>> ---
>> arch/arm64/kvm/sys_regs.c | 40
>> ++++++++++++++++++++++++++++++++++++++-
>> 1 file changed, 39 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 7a4cd644b9c0..47c882401f3c 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -1247,6 +1247,43 @@ static int set_id_aa64pfr0_el1(struct kvm_vcpu
>> *vcpu,
>> return 0;
>> }
>>
>> +static int set_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,
>> + const struct sys_reg_desc *rd,
>> + u64 val)
>> +{
>> + u8 pmuver, host_pmuver;
>> + bool valid_pmu;
>> +
>> + host_pmuver = kvm_arm_pmu_get_pmuver_limit();
>> +
>> + /*
>> + * Allow AA64DFR0_EL1.PMUver to be set from userspace as long
>> + * as it doesn't promise more than what the HW gives us. We
>> + * allow an IMPDEF PMU though, only if no PMU is supported
>> + * (KVM backward compatibility handling).
>> + */
>> + pmuver = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer),
>> val);
>> + if ((pmuver != ID_AA64DFR0_EL1_PMUVer_IMP_DEF && pmuver >
>> host_pmuver) ||
>> + (pmuver != 0 && pmuver < ID_AA64DFR0_EL1_PMUVer_IMP))
>
> Nit: Since this second condition cannot be true (right?), perhaps it
> might
> be rather confusing? I wasn't able to understand what it meant until
> I see the equivalent check in set_id_dfr0_el1() (Maybe just me
> though:).
Ah, that's just me being tainted with the AArch32 version which
doesn't start at 1 for PMUv3. I'll drop it.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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