[PATCH v6 2/2] EDAC/zynqmp: Add EDAC support for Xilinx ZynqMP OCM

[Borislav Petkov]

On Wed, Nov 09, 2022 at 11:21:41AM +0000, Potthuri, Sai Krishna wrote:
> > On Wed, Nov 02, 2022 at 12:36:55PM +0530, Sai Krishna Potthuri wrote:
> > > Add EDAC support for Xilinx ZynqMP OCM Controller, this driver
> > 
> > So a while ago you said that this driver is for the on chip memory controller.
> > Is it possible for such a system to have another memory controller too for
> > which another EDAC driver gets loaded?
> > 
> > Because the EDAC core - at least on x86 - assumes that a single driver runs on
> > the system and I don't think I've ever had the case where we need multiple
> > drivers. And in such case to audit it for concurrency issues.
> > 
> > So I guess the question is, can a system have zynqmp_ocm_edac and say,
> > synopsys_edac or some other EDAC driver loaded at the same time?
> Yes, we have this scenario on Xilinx ZynqMP platform where we have both
> the drivers (zynqmp_ocm_edac - OCM Controller and synopsys_edac - DDR
> Memory Controller) probed at the same time.

Ok, Shubhrajyoti is on Cc too. I asked him the same question - what the
possible drivers configuration would be and he gave me:

Platform	| Drivers / Controllers	|
------------------------------------------------------------ 
 ZynqMP	| Synopsys and OCM	|
Versal		| DDRMC and OCM	|

The ZynqMP platform needs Synopsys which is, let's say for simplicity,
the main EDAC driver using edac_mc* etc.

Looking at the patches, Versal is similar and uses the same APIs.

OCM uses the edac_device* stuff so that should be ok. I say "should"
because, again, I haven't played with multiple EDAC drivers system. But
we'll see where that gets us.

Ok, I guess architecture-wise this looks ok, I'll review the drivers
later and we'll see.

Thx.

-- 
Regards/Gruss,
    Boris.

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