[PATCH 19/20] arm64: dts: Update cache properties for synaptics

[Jisheng Zhang]

On Mon, Oct 31, 2022 at 10:21:14AM +0100, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> 
> The recently added init_of_cache_level() function checks
> these properties. Add them if missing.
> 
> Signed-off-by: Pierre Gondois <pierre.gondois at arm.com>

Reviewed-by: Jisheng Zhang <jszhang at kernel.org>

> ---
>  arch/arm64/boot/dts/synaptics/berlin4ct.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
> index 0949acee4728..926da7e1a6ba 100644
> --- a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
> +++ b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
> @@ -64,6 +64,7 @@ cpu3: cpu at 3 {
>  
>  		l2: cache {
>  			compatible = "cache";
> +			cache-level = <2>;
>  		};
>  
>  		idle-states {
> -- 
> 2.25.1
>