[PATCH] arm64: dts: ti: k3-j721e-main: Remove ti,strobe-sel property

[Bhavya Kapoor]

According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) .  Speed modes supported has been already
updated in PATCH eb8f6194e807. 'ti,strobe-sel' property is only
required by HS400 speed mode and thus needs to be removed from kernel
dtsi for J721e soc.

'ti,strobe-sel' is read in sdhci_am654.c line 733 and gets stored in
sdhci_am654->strb_sel. This sdhci_am654->strb_sel is used at only one
place in sdhci_am654.c line 291 which will only get used if HS400
is enabled.

Thus, drop 'ti,strobe-sel' property from kernel dtsi for J721e soc.

[.] https://www.ti.com/lit/er/sprz455/sprz455.pdf

Fixes: eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems")
Signed-off-by: Bhavya Kapoor <b-kapoor at ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 917c9dc99efa..e4748a838d83 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1094,7 +1094,6 @@
 		ti,itap-del-sel-mmc-hs = <0xa>;
 		ti,itap-del-sel-ddr52 = <0x3>;
 		ti,trm-icp = <0x8>;
-		ti,strobe-sel = <0x77>;
 		dma-coherent;
 	};
 
-- 
2.20.1