[PATCH 3/3] arm64: dts: allwinner: h6: Add deinterlace node

[Samuel Holland]

On 11/1/22 07:32, Jernej Skrabec wrote:
> H6 has deinterlace core. Add a node for it.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec at gmail.com>

Reviewed-by: Samuel Holland <samuel at sholland.org>

> ---
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 0aa6dfafc197..badc6afd6941 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -154,6 +154,18 @@ mixer0_out_tcon_top_mixer0: endpoint {
>  			};
>  		};
>  
> +		deinterlace at 1420000 {
> +			compatible = "allwinner,sun50i-h6-deinterlace";
> +			reg = <0x01420000 0x2000>;

Not that it matters, as long as the range is big enough, but how did you
come up with this size? The only thing I find in the vendor devicetrees
is 0x20c, the offset of the last documented register.

Regards,
Samuel

> +			clocks = <&ccu CLK_BUS_DEINTERLACE>,
> +				 <&ccu CLK_DEINTERLACE>,
> +				 <&ccu CLK_MBUS_DEINTERLACE>;
> +			clock-names = "bus", "mod", "ram";
> +			resets = <&ccu RST_BUS_DEINTERLACE>;
> +			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
> +			iommus = <&iommu 2>;
> +		};
> +
>  		video-codec-g2 at 1c00000 {
>  			compatible = "allwinner,sun50i-h6-vpu-g2";
>  			reg = <0x01c00000 0x1000>;