[PATCH v1 00/18] arm64/nmi: Support for FEAT_NMI

[Mark Brown]

This series enables the architecture and GIC support for the arm64
FEAT_NMI and FEAT_GICv3_NMI extensions in host kernels.  These introduce
support for a new category of interrupts in the architecture code which
we can use to provide NMI functionality, though the interrupts are in
fact maskable as the name would not imply.  The GIC support was done by
Loreozo Pieralisi.

There are two modes for using this FEAT_NMI, the one we use is the one
where any entry to ELn causes all interrupts including those with
superpriority to be masked by a new mask bit ALLINT.ALLINT on entry to
ELn until the mask is explicitly removed by software.  We do this early
in the C entry code for anything that is not a superpriority interrupt,
those are handled without unmasking.  Independent controls are provided
for this feature at each EL, usage at EL1 should not disrupt EL2 or EL3.

Since we can mask these not quite NMIs a large portion of the series is
concerned with updating places where we really do not want to be taking
interrupts of any kind to add masking for NMIs.  This masking is not
added to our standard interrupt masking operations since that would
result in widespread masking of NMIs which would undermine their value.
Given that there's a large amount of kernel code a good proportion of
which I'm not terribly familar with it is likely that this area of the
series needs attention in review as there may be be be areas that have
been missed or misunderstood.

In order to ensure that we do not have both pseudo NMIs and real NMIs
simultaneously enabled we disable NMIs if pseudo NMI support is enabled
in the kernel and has been requested on the command line, since pseudo
NMIs require explicit enablement it seemed most sensible to trust that
the user preferred them for some reason.

Using this feature in KVM guests will require the implementation of vGIC
support which is not present in this series, and there is also no usage
of the feature at EL2.  While FEAT_NMI does add a new writable register
ALLINT the value is already context switched for EL1 via SPSR_EL2.ALLINT 
and we can't trap read access to the register so we don't manage the
write trap that is available in HCRX_EL2.TALLINT.  Guests can read from
the register anyway and should only be able to affect their own state.

Lorenzo Pieralisi (1):
  irqchip/gic-v3: Implement FEAT_GICv3_NMI support

Mark Brown (17):
  arm64/booting: Document boot requirements for FEAT_NMI
  arm64/sysreg: Add definition for ICC_NMIAR1_EL1
  arm64/sysreg: Add definition of ISR_EL1
  arm64/sysreg: Add definitions for immediate versions of MSR ALLINT
  arm64/asm: Introduce assembly macros for managing ALLINT
  arm64/hyp-stub: Enable access to ALLINT
  arm64/idreg: Add an override for FEAT_NMI
  arm64/cpufeature: Detect PE support for NMIs
  arm64/entry: Manage ALLINT.ALLINT when FEAT_NMI is active
  arm64/mm: Disable all interrupts while replacing TTBR1
  arm64/hibernate: Disable NMIs while hibernating
  arm64/suspend: Disable NMIs while suspending
  arm64/kexec: Mask NMIs before starting new kernel
  arm64/acpi: Mask NMIs while notifying SEA
  arm64/irq: Document handling of FEAT_NMI in irqflags.h
  arm64/nmi: Add handling of superpriority interrupts as NMIs
  arm64/nmi: Add Kconfig for NMI

 Documentation/arm64/booting.rst     |   6 ++
 arch/arm64/Kconfig                  |  17 ++++
 arch/arm64/include/asm/assembler.h  |  16 ++++
 arch/arm64/include/asm/cpufeature.h |   6 ++
 arch/arm64/include/asm/daifflags.h  |   1 +
 arch/arm64/include/asm/irq.h        |   2 +
 arch/arm64/include/asm/irqflags.h   |  10 ++
 arch/arm64/include/asm/nmi.h        |  30 ++++++
 arch/arm64/include/asm/sysreg.h     |   2 +
 arch/arm64/kernel/acpi.c            |   8 +-
 arch/arm64/kernel/cpufeature.c      |  55 ++++++++++-
 arch/arm64/kernel/entry-common.c    |  73 ++++++++++++--
 arch/arm64/kernel/hibernate.c       |  12 +++
 arch/arm64/kernel/hyp-stub.S        |  12 +++
 arch/arm64/kernel/idreg-override.c  |   1 +
 arch/arm64/kernel/irq.c             |  32 +++++++
 arch/arm64/kernel/machine_kexec.c   |   2 +
 arch/arm64/kernel/suspend.c         |  11 +++
 arch/arm64/mm/proc.S                |   2 +
 arch/arm64/tools/cpucaps            |   1 +
 arch/arm64/tools/sysreg             |  15 +++
 drivers/irqchip/irq-gic-v3.c        | 143 +++++++++++++++++++++++-----
 include/linux/irqchip/arm-gic-v3.h  |   4 +
 23 files changed, 428 insertions(+), 33 deletions(-)
 create mode 100644 arch/arm64/include/asm/nmi.h


base-commit: 30a0b95b1335e12efef89dd78518ed3e4a71a763
-- 
2.30.2