[PATCH 2/3] arm64: dts: imx8mp: Deduplicate PCIe clock-names property

[Alexander Stein]

Am Mittwoch, 2. November 2022, 22:22:47 CET schrieb Marek Vasut:
> Move the PCIe clock-names property from various DTs into SoC dtsi to
> reduce duplication. In case of a couple of boards, reorder the clock
> so they match the order in yaml DT bindings.
> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Fabio Estevam <festevam at denx.de>
> Cc: Peng Fan <peng.fan at nxp.com>
> Cc: Richard Zhu <hongxing.zhu at nxp.com>
> Cc: Shawn Guo <shawnguo at kernel.org>
> Cc: NXP Linux Team <linux-imx at nxp.com>
> To: linux-arm-kernel at lists.infradead.org
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-evk.dts           | 5 ++---
>  arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts | 5 ++---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi              | 1 +
>  3 files changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index
> 9f1469db554d3..aa1cfa337c1ac 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -380,9 +380,8 @@ &pcie {
>  	pinctrl-0 = <&pinctrl_pcie0>;
>  	reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
>  	clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> -		 <&clk IMX8MP_CLK_PCIE_ROOT>,
> -		 <&clk IMX8MP_CLK_HSIO_AXI>;
> -	clock-names = "pcie", "pcie_aux", "pcie_bus";
> +		 <&clk IMX8MP_CLK_HSIO_AXI>,
> +		 <&clk IMX8MP_CLK_PCIE_ROOT>;
>  	assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
>  	assigned-clock-rates = <10000000>;
>  	assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts index
> ceeca4966fc5c..8a8f2a7b7a5e8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> @@ -594,9 +594,8 @@ &pcie {
>  	pinctrl-0 = <&pinctrl_pcie0>;
>  	reset-gpio = <&gpio2 17 GPIO_ACTIVE_LOW>;
>  	clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> -		 <&clk IMX8MP_CLK_PCIE_ROOT>,
> -		 <&clk IMX8MP_CLK_HSIO_AXI>;
> -	clock-names = "pcie", "pcie_aux", "pcie_bus";
> +		 <&clk IMX8MP_CLK_HSIO_AXI>,
> +		 <&clk IMX8MP_CLK_PCIE_ROOT>;
>  	assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
>  	assigned-clock-rates = <10000000>;
>  	assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index
> d7039d9fe61ad..69f8b2a42528a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1192,6 +1192,7 @@ pcie: pcie at 33800000 {
>  					<0 0 0 4 &gic GIC_SPI 123 
IRQ_TYPE_LEVEL_HIGH>;
>  			fsl,max-link-speed = <3>;
>  			linux,pci-domain = <0>;
> +			clock-names = "pcie", "pcie_bus", "pcie_aux";
>  			power-domains = <&hsio_blk_ctrl 
IMX8MP_HSIOBLK_PD_PCIE>;
>  			resets = <&src IMX8MP_RESET_PCIE_CTRL_APPS_EN>,
>  				 <&src 
IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF>;

For imx8mp.dtsi:
Reviewed-by: Alexander Stein <alexander.stein at ew.tq-group.com>

Thanks
Alexander