[PATCH 0/3] pinctrl: sunxi: Remove non-existent reset line references

[Samuel Holland]

I assume these properties came from a lack of documentation, and the
very reasonable assumption that where there's a clock gate bit in the
CCU, there's a reset bit. But the pin controllers are special and don't
have a module reset line. The only way to reset the pin controller is to
reset the whole VDD_SYS power domain.

This series is preparation for converting the PRCM MFD and legacy clock
drivers to a CCU clock/reset driver like all of the other Allwinner
SoCs. I don't plan to add reset lines that don't actually exist to the
new CCU driver. So we might as well get rid of the references now.
Technically this breaks devicetree compatibility, since the old drivers
expect the reset. But the CCU conversion will be a compatibility break
anyway, so it's a bit of a moot point.


Samuel Holland (3):
  pinctrl: sunxi: Remove reset controller consumers
  ARM: dts: sunxi: Drop resets from r_pio nodes
  dt-bindings: pinctrl: sunxi: Disallow the resets property

 .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml  |  3 ---
 arch/arm/boot/dts/sun6i-a31.dtsi              |  1 -
 arch/arm/boot/dts/sun8i-a23-a33.dtsi          |  1 -
 arch/arm/boot/dts/sun9i-a80.dtsi              |  1 -
 drivers/pinctrl/sunxi/Kconfig                 |  3 ---
 drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c  |  1 -
 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c   |  1 -
 drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c |  1 -
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c   | 22 +---------------
 drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c   | 25 +------------------
 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c  |  1 -
 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c   |  1 -
 12 files changed, 2 insertions(+), 59 deletions(-)

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2.35.1