[PATCH 1/3] dt-bindings: mfd: ti,j721e-system-controller: Add clock property

[Krzysztof Kozlowski]

On 27/05/2022 10:35, Rahul T R wrote:
> Add a pattern property for clock, also update the example with
> a clock node
> 
> Signed-off-by: Rahul T R <r-ravikumar at ti.com>
> ---
>  .../bindings/mfd/ti,j721e-system-controller.yaml     | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> index fa86691ebf16..e774a7f0bb08 100644
> --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> @@ -48,6 +48,12 @@ patternProperties:
>      description:
>        This is the SERDES lane control mux.
>  
> +  "^clock@[0-9a-f]+$":
> +    type: object
> +    $ref: ../clock/ti,am654-ehrpwm-tbclk.yaml#

Full path please, so /schemas/clock/.......

> +    description:
> +      This is TI syscon gate clk.

Don't use "This is". Just describe it without need of full sentence.
"syscon gate clock" is a bit unspecific and actually looks like you
describe "clocks" property...

> +
>  required:
>    - compatible
>    - reg
> @@ -79,5 +85,11 @@ examples:
>                  <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
>                  /* SERDES4 lane0/1/2/3 select */
>          };
> +
> +        ehrpwm_tbclk: clock at 4140 {

No need for label.

> +                compatible = "ti,am654-ehrpwm-tbclk", "syscon";

Messed up indentation.

> +                reg = <0x4140 0x18>;
> +                #clock-cells = <1>;
> +        };
>      };
>  ...


Best regards,
Krzysztof