[PATCH 1/3] fpga: mgr: Update the status for fpga-manager
Nava kishore Manne
nava.manne at xilinx.com
Tue May 24 02:47:43 PDT 2022
This patch update the below status values for
fpga-manager.
-Device Initialization error.
-Device internal signal error.
-All I/Os are placed in High-Z state.
-Device start-up sequence error.
-Firmware error.
Signed-off-by: Nava kishore Manne <nava.manne at xilinx.com>
---
drivers/fpga/fpga-mgr.c | 13 +++++++++++++
include/linux/fpga/fpga-mgr.h | 6 ++++++
2 files changed, 19 insertions(+)
diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
index a3595ecc3f79..be693fd531ea 100644
--- a/drivers/fpga/fpga-mgr.c
+++ b/drivers/fpga/fpga-mgr.c
@@ -475,6 +475,19 @@ static ssize_t status_show(struct device *dev,
len += sprintf(buf + len, "reconfig IP protocol error\n");
if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
len += sprintf(buf + len, "reconfig fifo overflow error\n");
+ if (status & FPGA_MGR_STATUS_SECURITY_ERR)
+ len += sprintf(buf + len, "reconfig security error\n");
+ if (status & FPGA_MGR_STATUS_DEVICE_INIT_ERR)
+ len += sprintf(buf + len, "Device Initialization error\n");
+ if (status & FPGA_MGR_STATUS_SIGNAL_ERR)
+ len += sprintf(buf + len, "Device internal signal error\n");
+ if (status & FPGA_MGR_STATUS_HIGH_Z_STATE_ERR)
+ len += sprintf(buf + len,
+ "All I/Os are placed in High-Z state\n");
+ if (status & FPGA_MGR_STATUS_EOS_ERR)
+ len += sprintf(buf + len, "Device start-up sequence error\n");
+ if (status & FPGA_MGR_STATUS_FIRMWARE_REQ_ERR)
+ len += sprintf(buf + len, "firmware error\n");
return len;
}
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index 0f9468771bb9..91accba14ba2 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -172,6 +172,12 @@ struct fpga_manager_ops {
#define FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR BIT(2)
#define FPGA_MGR_STATUS_IP_PROTOCOL_ERR BIT(3)
#define FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR BIT(4)
+#define FPGA_MGR_STATUS_SECURITY_ERR BIT(5)
+#define FPGA_MGR_STATUS_DEVICE_INIT_ERR BIT(6)
+#define FPGA_MGR_STATUS_SIGNAL_ERR BIT(7)
+#define FPGA_MGR_STATUS_HIGH_Z_STATE_ERR BIT(8)
+#define FPGA_MGR_STATUS_EOS_ERR BIT(9)
+#define FPGA_MGR_STATUS_FIRMWARE_REQ_ERR BIT(10)
/**
* struct fpga_manager - fpga manager structure
--
2.25.1
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