[PATCH 04/20] media: s5p-mfc: Rename IS_MFCV10 macro

Andrzej Hajda andrzej.hajda at intel.com
Wed May 18 23:46:54 PDT 2022



On 18.05.2022 10:41, Andrzej Hajda wrote:
>
>
> On 17.05.2022 14:55, Smitha T Murthy wrote:
>> Renames macro IS_MFCV10 to IS_MFCV10_PLUS so that the MFCv10
>> code can be resued for MFCv12 support. Since some part of MFCv10
>> specific code holds good for MFCv12 also.
>>
>> Cc: linux-fsd at tesla.com
>> Signed-off-by: Smitha T Murthy <smitha.t at samsung.com>
>> ---
>>   .../platform/samsung/s5p-mfc/s5p_mfc_common.h |  4 +--
>>   .../platform/samsung/s5p-mfc/s5p_mfc_ctrl.c   |  2 +-
>>   .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 28 +++++++++----------
>>   3 files changed, 17 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h 
>> b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
>> index 5304f42c8c72..ae266d8518d1 100644
>> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
>> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
>> @@ -774,8 +774,8 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, 
>> struct vb2_queue *vq);
>>   #define IS_MFCV6_PLUS(dev)    (dev->variant->version >= 0x60 ? 1 : 0)
>>   #define IS_MFCV7_PLUS(dev)    (dev->variant->version >= 0x70 ? 1 : 0)
>>   #define IS_MFCV8_PLUS(dev)    (dev->variant->version >= 0x80 ? 1 : 0)
>> -#define IS_MFCV10(dev)        (dev->variant->version >= 0xA0 ? 1 : 0)
>> -#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
>> +#define IS_MFCV10_PLUS(dev)    (dev->variant->version >= 0xA0 ? 1 : 0)
>
> The " ? 1 : 0" part of the macro is redundant, you can remove it here 
> and in other IS_MFC*_PLUS macros.

Moreover the history shows that IS_MFCVxx becomes IS_MFCVxx_PLUS, after 
next version, maybe you should use the new name, to avoid this renaming.

Regards
Andrzej

>
>> +#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10_PLUS(dev))
>>     #define MFC_V5_BIT    BIT(0)
>>   #define MFC_V6_BIT    BIT(1)
>> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c 
>> b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
>> index 72d70984e99a..ffe9f7e79eca 100644
>> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
>> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
>> @@ -236,7 +236,7 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
>>       else
>>           mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
>>   -    if (IS_MFCV10(dev))
>> +    if (IS_MFCV10_PLUS(dev))
>>           mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10);
>>         mfc_debug(2, "Will now wait for completion of firmware 
>> transfer\n");
>> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c 
>> b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
>> index 8227004f6746..728d255e65fc 100644
>> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
>> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
>> @@ -72,9 +72,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>                 ctx->luma_size, ctx->chroma_size, ctx->mv_size);
>>           mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
>>       } else if (ctx->type == MFCINST_ENCODER) {
>> -        if (IS_MFCV10(dev)) {
>> +        if (IS_MFCV10_PLUS(dev))
>>               ctx->tmv_buffer_size = 0;
>> -        } else if (IS_MFCV8_PLUS(dev))
>> +        else if (IS_MFCV8_PLUS(dev))
>>               ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
>>               ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
>>               S5P_FIMV_TMV_BUFFER_ALIGN_V6);
>> @@ -82,7 +82,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>               ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
>>               ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
>>               S5P_FIMV_TMV_BUFFER_ALIGN_V6);
>> -        if (IS_MFCV10(dev)) {
>> +        if (IS_MFCV10_PLUS(dev)) {
>>               lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width);
>>               lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height);
>>               if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
>> @@ -133,7 +133,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>       switch (ctx->codec_mode) {
>>       case S5P_MFC_CODEC_H264_DEC:
>>       case S5P_MFC_CODEC_H264_MVC_DEC:
>> -        if (IS_MFCV10(dev))
>> +        if (IS_MFCV10_PLUS(dev))
>>               mfc_debug(2, "Use min scratch buffer size\n");
>>           else if (IS_MFCV8_PLUS(dev))
>>               ctx->scratch_buf_size =
>> @@ -152,7 +152,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>               (ctx->mv_count * ctx->mv_size);
>>           break;
>>       case S5P_MFC_CODEC_MPEG4_DEC:
>> -        if (IS_MFCV10(dev))
>> +        if (IS_MFCV10_PLUS(dev))
>>               mfc_debug(2, "Use min scratch buffer size\n");
>>           else if (IS_MFCV7_PLUS(dev)) {
>>               ctx->scratch_buf_size =
>> @@ -172,7 +172,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>           break;
>>       case S5P_MFC_CODEC_VC1RCV_DEC:
>>       case S5P_MFC_CODEC_VC1_DEC:
>> -        if (IS_MFCV10(dev))
>> +        if (IS_MFCV10_PLUS(dev))
>>               mfc_debug(2, "Use min scratch buffer size\n");
>>           else
>>               ctx->scratch_buf_size =
>> @@ -189,7 +189,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>           ctx->bank2.size = 0;
>>           break;
>>       case S5P_MFC_CODEC_H263_DEC:
>> -        if (IS_MFCV10(dev))
>> +        if (IS_MFCV10_PLUS(dev))
>>               mfc_debug(2, "Use min scratch buffer size\n");
>>           else
>>               ctx->scratch_buf_size =
>> @@ -201,7 +201,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>           ctx->bank1.size = ctx->scratch_buf_size;
>>           break;
>>       case S5P_MFC_CODEC_VP8_DEC:
>> -        if (IS_MFCV10(dev))
>> +        if (IS_MFCV10_PLUS(dev))
>>               mfc_debug(2, "Use min scratch buffer size\n");
>>           else if (IS_MFCV8_PLUS(dev))
>>               ctx->scratch_buf_size =
>> @@ -230,7 +230,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>               DEC_VP9_STATIC_BUFFER_SIZE;
>>           break;
>>       case S5P_MFC_CODEC_H264_ENC:
>> -        if (IS_MFCV10(dev)) {
>> +        if (IS_MFCV10_PLUS(dev)) {
>>               mfc_debug(2, "Use min scratch buffer size\n");
>>               ctx->me_buffer_size =
>>               ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
>> @@ -254,7 +254,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>           break;
>>       case S5P_MFC_CODEC_MPEG4_ENC:
>>       case S5P_MFC_CODEC_H263_ENC:
>> -        if (IS_MFCV10(dev)) {
>> +        if (IS_MFCV10_PLUS(dev)) {
>>               mfc_debug(2, "Use min scratch buffer size\n");
>>               ctx->me_buffer_size =
>>                   ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
>> @@ -273,7 +273,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
>> s5p_mfc_ctx *ctx)
>>           ctx->bank2.size = 0;
>>           break;
>>       case S5P_MFC_CODEC_VP8_ENC:
>> -        if (IS_MFCV10(dev)) {
>> +        if (IS_MFCV10_PLUS(dev)) {
>>               mfc_debug(2, "Use min scratch buffer size\n");
>>               ctx->me_buffer_size =
>>                   ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
>> @@ -452,7 +452,7 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct 
>> s5p_mfc_ctx *ctx)
>>         if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
>>               ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
>> -        if (IS_MFCV10(dev)) {
>> +        if (IS_MFCV10_PLUS(dev)) {
>>               ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
>>                       ctx->img_height);
>>           } else {
>> @@ -668,7 +668,7 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct 
>> s5p_mfc_ctx *ctx)
>>         mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
>>   -    if (IS_MFCV10(dev)) {
>> +    if (IS_MFCV10_PLUS(dev)) {
>>           /* start address of per buffer is aligned */
>>           for (i = 0; i < ctx->pb_count; i++) {
>>               writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
>> @@ -2455,7 +2455,7 @@ const struct s5p_mfc_regs 
>> *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
>>       R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
>>       R(e_min_scratch_buffer_size, 
>> S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
>>   -    if (!IS_MFCV10(dev))
>> +    if (!IS_MFCV10_PLUS(dev))
>>           goto done;
>>         /* Initialize registers used in MFC v10 only.
>




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