[PATCH 04/18] PCI: Add PCI_EXP_SLTCAP_*_SHIFT macros

Pali Rohár pali at kernel.org
Wed May 18 12:26:00 PDT 2022


On Wednesday 18 May 2022 14:23:22 Bjorn Helgaas wrote:
> On Sun, Feb 20, 2022 at 08:33:32PM +0100, Marek Behún wrote:
> > From: Pali Rohár <pali at kernel.org>
> > 
> > These macros allows to easily compose and extract Slot Power Limit and
> > Physical Slot Number values from Slot Capability Register.
> > 
> > Signed-off-by: Pali Rohár <pali at kernel.org>
> > Signed-off-by: Marek Behún <kabel at kernel.org>
> 
> Acked-by: Bjorn Helgaas <bhelgaas at google.com>
> 
> We talked about using FIELD_PREP() / FIELD_GET(), which I think would
> remove the need for the *_SHIFT macros.  But we can always do that
> later.

I have already done this for pci-mvebu.c driver and patch was merged:
https://lore.kernel.org/linux-pci/20220412094946.27069-5-pali@kernel.org/

IIRC we have decided to not use those *_SHIFT macros as it would flood
public uapi file and from this file we cannot remove macros due to
userspace backward compatibility.

> > ---
> >  include/uapi/linux/pci_regs.h | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> > index bee1a9ed6e66..d825e17e448c 100644
> > --- a/include/uapi/linux/pci_regs.h
> > +++ b/include/uapi/linux/pci_regs.h
> > @@ -591,10 +591,13 @@
> >  #define  PCI_EXP_SLTCAP_HPS	0x00000020 /* Hot-Plug Surprise */
> >  #define  PCI_EXP_SLTCAP_HPC	0x00000040 /* Hot-Plug Capable */
> >  #define  PCI_EXP_SLTCAP_SPLV	0x00007f80 /* Slot Power Limit Value */
> > +#define  PCI_EXP_SLTCAP_SPLV_SHIFT	7  /* Slot Power Limit Value shift */
> >  #define  PCI_EXP_SLTCAP_SPLS	0x00018000 /* Slot Power Limit Scale */
> > +#define  PCI_EXP_SLTCAP_SPLS_SHIFT	15 /* Slot Power Limit Scale shift */
> >  #define  PCI_EXP_SLTCAP_EIP	0x00020000 /* Electromechanical Interlock Present */
> >  #define  PCI_EXP_SLTCAP_NCCS	0x00040000 /* No Command Completed Support */
> >  #define  PCI_EXP_SLTCAP_PSN	0xfff80000 /* Physical Slot Number */
> > +#define  PCI_EXP_SLTCAP_PSN_SHIFT	19 /* Physical Slot Number shift */
> >  #define PCI_EXP_SLTCTL		0x18	/* Slot Control */
> >  #define  PCI_EXP_SLTCTL_ABPE	0x0001	/* Attention Button Pressed Enable */
> >  #define  PCI_EXP_SLTCTL_PFDE	0x0002	/* Power Fault Detected Enable */
> > -- 
> > 2.34.1
> > 



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