[PATCH v2 4/4] perf tools: arm64: Add support for VG register

Leo Yan leo.yan at linaro.org
Wed May 18 02:57:35 PDT 2022


On Wed, May 18, 2022 at 10:44:57AM +0100, James Clark wrote:

[...]

> >> +	if (getauxval(AT_HWCAP) & HWCAP_SVE)
> >> +		attr.sample_regs_user |= SMPL_REG_MASK(PERF_REG_ARM64_VG);
> >> +
> >> +	/*
> >> +	 * Check if the pmu supports perf extended regs, before
> >> +	 * returning the register mask to sample.
> >> +	 */
> >> +	if (attr.sample_regs_user != PERF_REGS_MASK) {
> >> +		event_attr_init(&attr);
> >> +		fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
> >> +		if (fd != -1) {
> >> +			close(fd);
> >> +			return attr.sample_regs_user;
> >> +		}
> >> +	}
> > 
> > Just curious, since we can know SVE is supported from reading
> > auxiliary value, can we directly return the register mask as below?
> > 
> >   PERF_REGS_MASK | SMPL_REG_MASK(PERF_REG_ARM64_VG);
> 
> I was trying to cover the case where the system supports SVE, but
> the kernel doesn't have my changes to add the VG register yet.
> 
> Technically I could just attempt to open the event without checking
> for SVE first and see if it works or not. But I preferred to be
> explicit so it's obvious why we're doing that.

Understand; LGTM.

Reviewed-by: Leo Yan <leo.yan at linaro.org>



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