[PATCH v1 11/12] arm64/sme: Generate defintions for SVCR
Mark Rutland
mark.rutland at arm.com
Fri May 13 07:41:38 PDT 2022
On Tue, May 10, 2022 at 05:12:07PM +0100, Mark Brown wrote:
> Convert SVCR to automatic generation, no functional change.
>
> Signed-off-by: Mark Brown <broonie at kernel.org>
> ---
> arch/arm64/include/asm/sysreg.h | 4 ----
> arch/arm64/tools/sysreg | 6 ++++++
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index b4affc3fd569..804b5326c393 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -474,10 +474,6 @@
> #define SYS_RNDR_EL0 sys_reg(3, 3, 2, 4, 0)
> #define SYS_RNDRRS_EL0 sys_reg(3, 3, 2, 4, 1)
>
> -#define SYS_SVCR sys_reg(3, 3, 4, 2, 2)
> -#define SVCR_ZA_MASK 2
> -#define SVCR_SM_MASK 1
> -
> #define SYS_PMCR_EL0 sys_reg(3, 3, 9, 12, 0)
> #define SYS_PMCNTENSET_EL0 sys_reg(3, 3, 9, 12, 1)
> #define SYS_PMCNTENCLR_EL0 sys_reg(3, 3, 9, 12, 2)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index d29bc429f504..7888603db50a 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -211,6 +211,12 @@ Res0 14:12
> Field 11:0 AFFINITY
> EndSysreg
>
> +Sysreg SVCR 3 3 4 2 2
> +Res0 63:2
> +Field 1 ZA
> +Field 0 SM
> +EndSysreg
These all look right to me per ARM DDI 0487H.a, section C5.2.25, pages
C5-747 to C5-749.
Reviewed-by: Mark Rutland <mark.rutland at arm.com>
Mark.
> +
> Sysreg SMPRIMAP_EL2 3 4 1 2 5
> Field 63:60 P15
> Field 59:56 P14
> --
> 2.30.2
>
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