[PATCH 0/3] irqchip/gic-v3: pseudo-NMI fixes

[Mark Rutland]

These patches fix a couple of issues with the way GICv3 pseudo-NMIs are
handled:

* The first patch adds a barrier we missed from NMI handling due to an
  oversight.

* The second patch refactors some logic around reads from ICC_IAR1_EL1
  and adds commentary to explain what's going on.

* The third patch descends into madness, reworking gic_handle_irq() to
  consistently manage ICC_PMR_EL1 + DAIF and avoid cases where these can
  be left in an inconsistent state while softirqs are processed.

I've given these a beating in a QEMU KVM VM on a ThunderX2 host.

Note that arm64 has some orthogonal issues with lockdep which are fixed
by:

  https://lore.kernel.org/linux-arm-kernel/20220511131733.4074499-1-mark.rutland@arm.com/

... so to test with lockdep enabled it is necessary to apply that
series too.

Thanks,
Mark.

Mark Rutland (3):
  irqchip/gic-v3: ensure pseudo-NMIs have an ISB between ack and
    handling
  irqchip/gic-v3: refactor ISB + EOIR at ack time
  irqchip/gic-v3: fix priority mask handling

 arch/arm/include/asm/arch_gicv3.h   |   7 +-
 arch/arm64/include/asm/arch_gicv3.h |   6 -
 drivers/irqchip/irq-gic-v3.c        | 183 ++++++++++++++++++----------
 3 files changed, 121 insertions(+), 75 deletions(-)

-- 
2.30.2