[PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
Carsten Haitzler
carsten.haitzler at foss.arm.com
Fri May 13 03:42:14 PDT 2022
That seems sensible to me. It matches the kind of DT content I know
works. It's certainly more detailed now.
On 5/6/22 15:05, Andre Przywara wrote:
> The Arm Komeda (aka Mali-D71) is a display controller that scans out a
> framebuffer and hands a signal to a digital encoder to generate a DVI
> or HDMI signal. It supports up to two pipelines, each frame can be
> composed of up to four layers.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara at arm.com>
> ---
> .../bindings/display/arm,komeda.txt | 78 -----------
> .../bindings/display/arm,komeda.yaml | 130 ++++++++++++++++++
> 2 files changed, 130 insertions(+), 78 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
> deleted file mode 100644
> index 8513695ee47fe..0000000000000
> --- a/Documentation/devicetree/bindings/display/arm,komeda.txt
> +++ /dev/null
> @@ -1,78 +0,0 @@
> -Device Tree bindings for Arm Komeda display driver
> -
> -Required properties:
> -- compatible: Should be "arm,mali-d71"
> -- reg: Physical base address and length of the registers in the system
> -- interrupts: the interrupt line number of the device in the system
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> - in 'clock-names'
> -- clock-names: A list of clock names. It should contain:
> - - "aclk": for the main processor clock
> -- #address-cells: Must be 1
> -- #size-cells: Must be 0
> -- iommus: configure the stream id to IOMMU, Must be configured if want to
> - enable iommu in display. for how to configure this node please reference
> - devicetree/bindings/iommu/arm,smmu-v3.txt,
> - devicetree/bindings/iommu/iommu.txt
> -
> -Required properties for sub-node: pipeline at nq
> -Each device contains one or two pipeline sub-nodes (at least one), each
> -pipeline node should provide properties:
> -- reg: Zero-indexed identifier for the pipeline
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> - in 'clock-names'
> -- clock-names: should contain:
> - - "pxclk": pixel clock
> -
> -- port: each pipeline connect to an encoder input port. The connection is
> - modeled using the OF graph bindings specified in
> - Documentation/devicetree/bindings/graph.txt
> -
> -Optional properties:
> - - memory-region: phandle to a node describing memory (see
> - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
> - to be used for the framebuffer; if not present, the framebuffer may
> - be located anywhere in memory.
> -
> -Example:
> -/ {
> - ...
> -
> - dp0: display at c00000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "arm,mali-d71";
> - reg = <0xc00000 0x20000>;
> - interrupts = <0 168 4>;
> - clocks = <&dpu_aclk>;
> - clock-names = "aclk";
> - iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> - <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> - <&smmu 8>, <&smmu 9>;
> -
> - dp0_pipe0: pipeline at 0 {
> - clocks = <&fpgaosc2>;
> - clock-names = "pxclk";
> - reg = <0>;
> -
> - port {
> - dp0_pipe0_out: endpoint {
> - remote-endpoint = <&db_dvi0_in>;
> - };
> - };
> - };
> -
> - dp0_pipe1: pipeline at 1 {
> - clocks = <&fpgaosc2>;
> - clock-names = "pxclk";
> - reg = <1>;
> -
> - port {
> - dp0_pipe1_out: endpoint {
> - remote-endpoint = <&db_dvi1_in>;
> - };
> - };
> - };
> - };
> - ...
> -};
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> new file mode 100644
> index 0000000000000..9f4aade97f10a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> @@ -0,0 +1,130 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Arm Komeda display processor
> +
> +maintainers:
> + - Liviu Dudau <Liviu.Dudau at arm.com>
> + - Andre Przywara <andre.przywara at arm.com>
> +
> +description:
> + The Arm Mali D71 display processor supports up to two displays with up
> + to a 4K resolution each. Each pipeline can be composed of up to four
> + layers. It is typically connected to a digital display connector like HDMI.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - const: arm,mali-d32
> + - const: arm,mali-d71
> + - const: arm,mali-d71
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clock-names:
> + const: aclk
> +
> + clocks:
> + maxItems: 1
> + description: The main DPU processor clock
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + memory-region:
> + maxItems: 1
> + description:
> + Phandle to a node describing memory to be used for the framebuffer.
> + If not present, the framebuffer may be located anywhere in memory.
> +
> + iommus:
> + description:
> + The stream IDs for each of the used pipelines, each four IDs for the
> + four layers, plus one for the write-back stream.
> + minItems: 5
> + maxItems: 10
> +
> +patternProperties:
> + '^pipeline@[01]$':
> + type: object
> + description:
> + clocks
> +
> + properties:
> + reg:
> + enum: [ 0, 1 ]
> +
> + clock-names:
> + const: pxclk
> +
> + clocks:
> + maxItems: 1
> + description: The input reference for the pixel clock.
> +
> + port:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> +
> +additionalProperties: false
> +
> +required:
> + - "#address-cells"
> + - "#size-cells"
> + - compatible
> + - reg
> + - interrupts
> + - clock-names
> + - clocks
> + - pipeline at 0
> +
> +examples:
> + - |
> + display at c00000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "arm,mali-d71";
> + reg = <0xc00000 0x20000>;
> + interrupts = <168>;
> + clocks = <&dpu_aclk>;
> + clock-names = "aclk";
> + iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> + <&smmu 8>,
> + <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> + <&smmu 9>;
> +
> + dp0_pipe0: pipeline at 0 {
> + clocks = <&fpgaosc2>;
> + clock-names = "pxclk";
> + reg = <0>;
> +
> + port {
> + dp0_pipe0_out: endpoint {
> + remote-endpoint = <&db_dvi0_in>;
> + };
> + };
> + };
> +
> + dp0_pipe1: pipeline at 1 {
> + clocks = <&fpgaosc2>;
> + clock-names = "pxclk";
> + reg = <1>;
> +
> + port {
> + dp0_pipe1_out: endpoint {
> + remote-endpoint = <&db_dvi1_in>;
> + };
> + };
> + };
> + };
> +...
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