[xilinx-xlnx:xlnx_rebase_v5.15_LTS 840/1138] drivers/mtd/spi-nor/core.c:3318:13: warning: unused variable 'is_dual'
kernel test robot
lkp at intel.com
Wed May 11 21:23:05 PDT 2022
tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.15_LTS
head: 9ef3be1de28ec61f4dad2b16b1097b7e2270a5a6
commit: 2747bc2106aa429773d9a932c799aa6229595148 [840/1138] mtd: spi-nor: Add dual parallel and stacked mode support
config: x86_64-randconfig-a013-20220509 (https://download.01.org/0day-ci/archive/20220512/202205121254.MxvRggvH-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.2.0-20) 11.2.0
reproduce (this is a W=1 build):
# https://github.com/Xilinx/linux-xlnx/commit/2747bc2106aa429773d9a932c799aa6229595148
git remote add xilinx-xlnx https://github.com/Xilinx/linux-xlnx
git fetch --no-tags xilinx-xlnx xlnx_rebase_v5.15_LTS
git checkout 2747bc2106aa429773d9a932c799aa6229595148
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/mtd/spi-nor/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>
All warnings (new ones prefixed by >>):
drivers/mtd/spi-nor/core.c: In function 'spi_nor_scan':
>> drivers/mtd/spi-nor/core.c:3318:13: warning: unused variable 'is_dual' [-Wunused-variable]
3318 | u32 is_dual;
| ^~~~~~~
>> drivers/mtd/spi-nor/core.c:3317:29: warning: unused variable 'np_spi' [-Wunused-variable]
3317 | struct device_node *np_spi;
| ^~~~~~
vim +/is_dual +3318 drivers/mtd/spi-nor/core.c
3307
3308 int spi_nor_scan(struct spi_nor *nor, const char *name,
3309 const struct spi_nor_hwcaps *hwcaps)
3310 {
3311 struct flash_info *info = NULL;
3312 struct device *dev = nor->dev;
3313 struct mtd_info *mtd = &nor->mtd;
3314 struct device_node *np = spi_nor_get_flash_node(nor);
3315 int ret;
3316 int i;
> 3317 struct device_node *np_spi;
> 3318 u32 is_dual;
3319
3320 ret = spi_nor_check(nor);
3321 if (ret)
3322 return ret;
3323
3324 /* Reset SPI protocol for all commands. */
3325 nor->reg_proto = SNOR_PROTO_1_1_1;
3326 nor->read_proto = SNOR_PROTO_1_1_1;
3327 nor->write_proto = SNOR_PROTO_1_1_1;
3328
3329 /*
3330 * We need the bounce buffer early to read/write registers when going
3331 * through the spi-mem layer (buffers have to be DMA-able).
3332 * For spi-mem drivers, we'll reallocate a new buffer if
3333 * nor->page_size turns out to be greater than PAGE_SIZE (which
3334 * shouldn't happen before long since NOR pages are usually less
3335 * than 1KB) after spi_nor_scan() returns.
3336 */
3337 nor->bouncebuf_size = PAGE_SIZE;
3338 nor->bouncebuf = devm_kmalloc(dev, nor->bouncebuf_size,
3339 GFP_KERNEL);
3340 if (!nor->bouncebuf)
3341 return -ENOMEM;
3342
3343 info = (struct flash_info *)spi_nor_get_flash_info(nor, name);
3344 if (IS_ERR(info))
3345 return PTR_ERR(info);
3346
3347 nor->info = info;
3348
3349 spi_nor_debugfs_init(nor, info);
3350
3351 mutex_init(&nor->lock);
3352
3353 /*
3354 * Make sure the XSR_RDY flag is set before calling
3355 * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
3356 * with Atmel SPI NOR.
3357 */
3358 if (info->flags & SPI_NOR_XSR_RDY)
3359 nor->flags |= SNOR_F_READY_XSR_RDY;
3360
3361 if (info->flags & SPI_NOR_HAS_LOCK)
3362 nor->flags |= SNOR_F_HAS_LOCK;
3363
3364 /* sst nor chips use AAI word program */
3365 if (info->flags & SST_WRITE)
3366 mtd->_write = sst_write;
3367 else
3368 mtd->_write = spi_nor_write;
3369
3370 /* Init flash parameters based on flash_info struct and SFDP */
3371 ret = spi_nor_init_params(nor);
3372 if (ret)
3373 return ret;
3374
3375 if (!mtd->name)
3376 mtd->name = dev_name(dev);
3377 mtd->priv = nor;
3378 mtd->type = MTD_NORFLASH;
3379 mtd->writesize = nor->params->writesize;
3380 mtd->flags = MTD_CAP_NORFLASH;
3381 mtd->size = nor->params->size;
3382 mtd->_erase = spi_nor_erase;
3383 mtd->_read = spi_nor_read;
3384 nor->page_size = nor->params->page_size;
3385 #ifdef CONFIG_OF
3386 np_spi = of_get_next_parent(np);
3387 if (((of_property_match_string(np_spi, "compatible",
3388 "xlnx,zynq-qspi-1.0") >= 0) ||
3389 (of_property_match_string(np_spi, "compatible",
3390 "xlnx,zynqmp-qspi-1.0") >= 0)) ||
3391 (of_property_match_string(np_spi, "compatible",
3392 "xlnx,versal-qspi-1.0") >= 0) ||
3393 (of_property_match_string(np_spi, "compatible",
3394 "xlnx,versal-ospi-1.0") >= 0)) {
3395 if (of_property_read_u32(np_spi, "is-dual",
3396 &is_dual) < 0) {
3397 /* Default to single if prop not defined */
3398 nor->shift = 0;
3399 nor->isstacked = 0;
3400 nor->isparallel = 0;
3401 } else {
3402 if (is_dual == 1) {
3403 /* dual parallel */
3404 nor->shift = 1;
3405 info->sector_size <<= nor->shift;
3406 info->page_size <<= nor->shift;
3407 nor->page_size = info->page_size;
3408 mtd->size <<= nor->shift;
3409 nor->isparallel = 1;
3410 nor->isstacked = 0;
3411 nor->spi->master->flags |=
3412 (SPI_MASTER_DATA_STRIPE
3413 | SPI_MASTER_BOTH_CS);
3414 } else {
3415 #ifdef CONFIG_SPI_ZYNQ_QSPI_DUAL_STACKED
3416 /* dual stacked */
3417 nor->shift = 0;
3418 mtd->size <<= 1;
3419 info->n_sectors <<= 1;
3420 nor->isstacked = 1;
3421 nor->isparallel = 0;
3422 #else
3423 u32 is_stacked;
3424
3425 if (of_property_read_u32(np_spi,
3426 "is-stacked",
3427 &is_stacked) < 0) {
3428 is_stacked = 0;
3429 }
3430 if (is_stacked) {
3431 /* dual stacked */
3432 nor->shift = 0;
3433 mtd->size <<= 1;
3434 info->n_sectors <<= 1;
3435 nor->isstacked = 1;
3436 nor->isparallel = 0;
3437 } else {
3438 /* single */
3439 nor->shift = 0;
3440 nor->isstacked = 0;
3441 nor->isparallel = 0;
3442 }
3443 #endif
3444 }
3445 }
3446 }
3447 #else
3448 /* Default to single */
3449 nor->shift = 0;
3450 nor->isstacked = 0;
3451 nor->isparallel = 0;
3452 #endif
3453
3454 mtd->_suspend = spi_nor_suspend;
3455 mtd->_resume = spi_nor_resume;
3456 mtd->_get_device = spi_nor_get_device;
3457 mtd->_put_device = spi_nor_put_device;
3458
3459 if (info->flags & USE_FSR)
3460 nor->flags |= SNOR_F_USE_FSR;
3461 if (info->flags & SPI_NOR_HAS_TB) {
3462 nor->flags |= SNOR_F_HAS_SR_TB;
3463 if (info->flags & SPI_NOR_TB_SR_BIT6)
3464 nor->flags |= SNOR_F_HAS_SR_TB_BIT6;
3465 }
3466
3467 if (info->flags & NO_CHIP_ERASE)
3468 nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
3469 if (info->flags & USE_CLSR)
3470 nor->flags |= SNOR_F_USE_CLSR;
3471 if (info->flags & SPI_NOR_SWP_IS_VOLATILE)
3472 nor->flags |= SNOR_F_SWP_IS_VOLATILE;
3473
3474 if (info->flags & SPI_NOR_4BIT_BP) {
3475 nor->flags |= SNOR_F_HAS_4BIT_BP;
3476 if (info->flags & SPI_NOR_BP3_SR_BIT6)
3477 nor->flags |= SNOR_F_HAS_SR_BP3_BIT6;
3478 }
3479
3480 if (info->flags & SPI_NOR_NO_ERASE)
3481 mtd->flags |= MTD_NO_ERASE;
3482
3483 mtd->dev.parent = dev;
3484 nor->jedec_id = info->id[0];
3485 mtd->writebufsize = nor->page_size;
3486
3487 if (of_property_read_bool(np, "broken-flash-reset"))
3488 nor->flags |= SNOR_F_BROKEN_RESET;
3489
3490 /*
3491 * Configure the SPI memory:
3492 * - select op codes for (Fast) Read, Page Program and Sector Erase.
3493 * - set the number of dummy cycles (mode cycles + wait states).
3494 * - set the SPI protocols for register and memory accesses.
3495 */
3496 ret = spi_nor_setup(nor, hwcaps);
3497 if (ret)
3498 return ret;
3499
3500 if (info->flags & SPI_NOR_4B_OPCODES)
3501 nor->flags |= SNOR_F_4B_OPCODES;
3502
3503 if (info->flags & SPI_NOR_IO_MODE_EN_VOLATILE)
3504 nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;
3505
3506 ret = spi_nor_set_addr_width(nor);
3507 if (ret)
3508 return ret;
3509
3510 spi_nor_register_locking_ops(nor);
3511
3512 /* Send all the required SPI flash commands to initialize device */
3513 ret = spi_nor_init(nor);
3514 if (ret)
3515 return ret;
3516
3517 /* Configure OTP parameters and ops */
3518 spi_nor_otp_init(nor);
3519
3520 dev_info(dev, "%s (%lld Kbytes)\n", info->name,
3521 (long long)mtd->size >> 10);
3522
3523 dev_dbg(dev,
3524 "mtd .name = %s, .size = 0x%llx (%lldMiB), "
3525 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
3526 mtd->name, (long long)mtd->size, (long long)(mtd->size >> 20),
3527 mtd->erasesize, mtd->erasesize / 1024, mtd->numeraseregions);
3528
3529 if (mtd->numeraseregions)
3530 for (i = 0; i < mtd->numeraseregions; i++)
3531 dev_dbg(dev,
3532 "mtd.eraseregions[%d] = { .offset = 0x%llx, "
3533 ".erasesize = 0x%.8x (%uKiB), "
3534 ".numblocks = %d }\n",
3535 i, (long long)mtd->eraseregions[i].offset,
3536 mtd->eraseregions[i].erasesize,
3537 mtd->eraseregions[i].erasesize / 1024,
3538 mtd->eraseregions[i].numblocks);
3539 return 0;
3540 }
3541 EXPORT_SYMBOL_GPL(spi_nor_scan);
3542
--
0-DAY CI Kernel Test Service
https://01.org/lkp
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