[PATCH v6 1/3] dt-bindings: marvell: Document the AC5/AC5X compatibles

Andrew Lunn andrew at lunn.ch
Wed May 11 17:27:28 PDT 2022


On Wed, May 11, 2022 at 11:14:25PM +0000, Chris Packham wrote:
> 
> On 12/05/22 05:02, Andrew Lunn wrote:
> > On Wed, May 11, 2022 at 11:10:00AM +1200, Chris Packham wrote:
> >> Describe the compatible properties for the Marvell Alleycat5/5X switches
> >> with integrated CPUs.
> >>
> >> Alleycat5:
> >> * 98DX2538: 24x1G + 2x10G + 2x10G Stack
> >> * 98DX2535: 24x1G + 4x1G Stack
> >> * 98DX2532: 8x1G + 2x10G + 2x1G Stack
> >> * 98DX2531: 8x1G + 4x1G Stack
> >> * 98DX2528: 24x1G + 2x10G + 2x10G Stack
> >> * 98DX2525: 24x1G + 4x1G Stack
> >> * 98DX2522: 8x1G + 2x10G + 2x1G Stack
> >> * 98DX2521: 8x1G + 4x1G Stack
> >> * 98DX2518: 24x1G + 2x10G + 2x10G Stack
> >> * 98DX2515: 24x1G + 4x1G Stack
> >> * 98DX2512: 8x1G + 2x10G + 2x1G Stack
> >> * 98DX2511: 8x1G + 4x1G Stack
> >>
> >> Alleycat5X:
> >> * 98DX3500: 24x1G + 6x25G
> >> * 98DX3501: 16x1G + 6x10G
> >> * 98DX3510: 48x1G + 6x25G
> >> * 98DX3520: 24x2.5G + 6x25G
> >> * 98DX3530: 48x2.5G + 6x25G
> >> * 98DX3540: 12x5G/6x10G + 6x25G
> >> * 98DX3550: 24x5G/12x10G + 6x25G
> > Hi Chris
> >
> > When looking at this list, is it just the switch which changes, and
> > everything else in the package stays the same?
> 
> CPU wise I've been told everything is identical. The differences are all 
> in the switch side.

O.K. That helps a lot with this description.

> > armada-98DX2538.dtsi which extends armada-98DX25xx.dtsi
> 
> There wouldn't be anything to add in 98DX2538 (at least not until we 
> have a proper switchdev driver).

Does the switch/SoC have ID registers? For mv88e6xxx, the switch is
identified by its ID registers, so we don't have switch specific
compatible value in DT. Hopefully it is the same here. All we need to
say is that there is a switch in the main .dtsi file, and the .dts
file would then indicate which ports are actually used.

   Andrew



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