[PATCH v6 12/12] arm64/sysreg: Generate definitions for SCTLR_EL1

[Catalin Marinas]

On Wed, May 04, 2022 at 05:40:42PM +0100, Mark Brown wrote:
> On Wed, May 04, 2022 at 05:32:55PM +0100, Mark Rutland wrote:
> > On Tue, May 03, 2022 at 06:02:33PM +0100, Mark Brown wrote:
> > > Automatically generate register definitions for SCTLR_EL1. No functional
> > > change.
> 
> > > -#define SYS_SCTLR_EL1			sys_reg(3, 0, 1, 0, 0)
> 
> > > +Sysreg	SCTLR_EL1	3	0	1	9	9
> 
> > Looks like the 0s got replaced with 9s somehow?
> 
> > I guess at EL1 we happen to get away with that being completely wrong since
> > we'll use the assembler's version of the register definition, and only KVM
> > notices.
> 
> Ah, indeed - that'll just have been a typo when I originally entered
> things.

I'll fix it in place, I haven't pushed the branch out yet. Thanks both
for confirming.

-- 
Catalin