[PATCH] arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
Geert Uytterhoeven
geert+renesas at glider.be
Mon May 2 06:35:17 PDT 2022
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
- DMAC,
- (H)SCIF,
- I2C,
- IPMMU,
- WDT.
Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
---
To be queued in renesas-devel for v5.19.
All R-Car Gen4 family-specific compatible values added are already
supported by device drivers in v5.18-rc1, except for HSCIF, where the
driver matches on the generic "renesas,hscif" compatible value instead.
Hence this patch is safe to apply.
Patches to update the corresponding DT bindings[1] and SoC identication
code[1] are in-flight.
Updating the remaining compatible properties is postponed until the
corresponding DT bindings and device drivers have been updated.
[1] [PATCH 0/7] dt-bindings: renesas: R-Car V3U is R-Car Gen4
https://lore.kernel.org/cover.1651497024.git.geert+renesas@glider.be
[2] [PATCH] soc: renesas: R-Car V3U is R-Car Gen4
https://lore.kernel.org/2bbecad7b6c24c0d5c1797b3f7f0733d5ba33842.1651497066.git.geert+renesas@glider.be
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 74 ++++++++++++++---------
1 file changed, 44 insertions(+), 30 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 57d49d27cdca72d0..528ad6049a6fbc15 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -86,7 +86,7 @@ soc: soc {
rwdt: watchdog at e6020000 {
compatible = "renesas,r8a779a0-wdt",
- "renesas,rcar-gen3-wdt";
+ "renesas,rcar-gen4-wdt";
reg = <0 0xe6020000 0 0x0c>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 907>;
@@ -430,7 +430,7 @@ tmu4: timer at ffc00000 {
i2c0: i2c at e6500000 {
compatible = "renesas,i2c-r8a779a0",
- "renesas,rcar-gen3-i2c";
+ "renesas,rcar-gen4-i2c";
reg = <0 0xe6500000 0 0x40>;
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 518>;
@@ -446,7 +446,7 @@ i2c0: i2c at e6500000 {
i2c1: i2c at e6508000 {
compatible = "renesas,i2c-r8a779a0",
- "renesas,rcar-gen3-i2c";
+ "renesas,rcar-gen4-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 519>;
@@ -462,7 +462,7 @@ i2c1: i2c at e6508000 {
i2c2: i2c at e6510000 {
compatible = "renesas,i2c-r8a779a0",
- "renesas,rcar-gen3-i2c";
+ "renesas,rcar-gen4-i2c";
reg = <0 0xe6510000 0 0x40>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>;
@@ -478,7 +478,7 @@ i2c2: i2c at e6510000 {
i2c3: i2c at e66d0000 {
compatible = "renesas,i2c-r8a779a0",
- "renesas,rcar-gen3-i2c";
+ "renesas,rcar-gen4-i2c";
reg = <0 0xe66d0000 0 0x40>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 521>;
@@ -494,7 +494,7 @@ i2c3: i2c at e66d0000 {
i2c4: i2c at e66d8000 {
compatible = "renesas,i2c-r8a779a0",
- "renesas,rcar-gen3-i2c";
+ "renesas,rcar-gen4-i2c";
reg = <0 0xe66d8000 0 0x40>;
interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
@@ -510,7 +510,7 @@ i2c4: i2c at e66d8000 {
i2c5: i2c at e66e0000 {
compatible = "renesas,i2c-r8a779a0",
- "renesas,rcar-gen3-i2c";
+ "renesas,rcar-gen4-i2c";
reg = <0 0xe66e0000 0 0x40>;
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 523>;
@@ -526,7 +526,7 @@ i2c5: i2c at e66e0000 {
i2c6: i2c at e66e8000 {
compatible = "renesas,i2c-r8a779a0",
- "renesas,rcar-gen3-i2c";
+ "renesas,rcar-gen4-i2c";
reg = <0 0xe66e8000 0 0x40>;
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 524>;
@@ -542,7 +542,7 @@ i2c6: i2c at e66e8000 {
hscif0: serial at e6540000 {
compatible = "renesas,hscif-r8a779a0",
- "renesas,rcar-gen3-hscif", "renesas,hscif";
+ "renesas,rcar-gen4-hscif", "renesas,hscif";
reg = <0 0xe6540000 0 0x60>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 514>,
@@ -558,7 +558,7 @@ hscif0: serial at e6540000 {
hscif1: serial at e6550000 {
compatible = "renesas,hscif-r8a779a0",
- "renesas,rcar-gen3-hscif", "renesas,hscif";
+ "renesas,rcar-gen4-hscif", "renesas,hscif";
reg = <0 0xe6550000 0 0x60>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 515>,
@@ -574,7 +574,7 @@ hscif1: serial at e6550000 {
hscif2: serial at e6560000 {
compatible = "renesas,hscif-r8a779a0",
- "renesas,rcar-gen3-hscif", "renesas,hscif";
+ "renesas,rcar-gen4-hscif", "renesas,hscif";
reg = <0 0xe6560000 0 0x60>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 516>,
@@ -590,7 +590,7 @@ hscif2: serial at e6560000 {
hscif3: serial at e66a0000 {
compatible = "renesas,hscif-r8a779a0",
- "renesas,rcar-gen3-hscif", "renesas,hscif";
+ "renesas,rcar-gen4-hscif", "renesas,hscif";
reg = <0 0xe66a0000 0 0x60>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>,
@@ -943,7 +943,7 @@ avb5: ethernet at e6850000 {
scif0: serial at e6e60000 {
compatible = "renesas,scif-r8a779a0",
- "renesas,rcar-gen3-scif", "renesas,scif";
+ "renesas,rcar-gen4-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 702>,
@@ -959,7 +959,7 @@ scif0: serial at e6e60000 {
scif1: serial at e6e68000 {
compatible = "renesas,scif-r8a779a0",
- "renesas,rcar-gen3-scif", "renesas,scif";
+ "renesas,rcar-gen4-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>,
@@ -975,7 +975,7 @@ scif1: serial at e6e68000 {
scif3: serial at e6c50000 {
compatible = "renesas,scif-r8a779a0",
- "renesas,rcar-gen3-scif", "renesas,scif";
+ "renesas,rcar-gen4-scif", "renesas,scif";
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 704>,
@@ -991,7 +991,7 @@ scif3: serial at e6c50000 {
scif4: serial at e6c40000 {
compatible = "renesas,scif-r8a779a0",
- "renesas,rcar-gen3-scif", "renesas,scif";
+ "renesas,rcar-gen4-scif", "renesas,scif";
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 705>,
@@ -2003,7 +2003,8 @@ vin31isp3: endpoint at 3 {
};
dmac1: dma-controller at e7350000 {
- compatible = "renesas,dmac-r8a779a0";
+ compatible = "renesas,dmac-r8a779a0",
+ "renesas,rcar-gen4-dmac";
reg = <0 0xe7350000 0 0x1000>,
<0 0xe7300000 0 0x10000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
@@ -2037,7 +2038,8 @@ dmac1: dma-controller at e7350000 {
};
dmac2: dma-controller at e7351000 {
- compatible = "renesas,dmac-r8a779a0";
+ compatible = "renesas,dmac-r8a779a0",
+ "renesas,rcar-gen4-dmac";
reg = <0 0xe7351000 0 0x1000>,
<0 0xe7310000 0 0x10000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
@@ -2092,7 +2094,8 @@ rpc: spi at ee200000 {
};
ipmmu_rt0: iommu at ee480000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xee480000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2100,7 +2103,8 @@ ipmmu_rt0: iommu at ee480000 {
};
ipmmu_rt1: iommu at ee4c0000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xee4c0000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 19>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2108,7 +2112,8 @@ ipmmu_rt1: iommu at ee4c0000 {
};
ipmmu_ds0: iommu at eed00000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeed00000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2116,7 +2121,8 @@ ipmmu_ds0: iommu at eed00000 {
};
ipmmu_ds1: iommu at eed40000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeed40000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2124,7 +2130,8 @@ ipmmu_ds1: iommu at eed40000 {
};
ipmmu_ir: iommu at eed80000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeed80000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
power-domains = <&sysc R8A779A0_PD_A3IR>;
@@ -2132,7 +2139,8 @@ ipmmu_ir: iommu at eed80000 {
};
ipmmu_vc0: iommu at eedc0000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeedc0000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2140,7 +2148,8 @@ ipmmu_vc0: iommu at eedc0000 {
};
ipmmu_vi0: iommu at eee80000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeee80000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2148,7 +2157,8 @@ ipmmu_vi0: iommu at eee80000 {
};
ipmmu_vi1: iommu at eeec0000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeeec0000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 15>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2156,7 +2166,8 @@ ipmmu_vi1: iommu at eeec0000 {
};
ipmmu_3dg: iommu at eee00000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeee00000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2164,7 +2175,8 @@ ipmmu_3dg: iommu at eee00000 {
};
ipmmu_vip0: iommu at eef00000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeef00000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 5>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2172,7 +2184,8 @@ ipmmu_vip0: iommu at eef00000 {
};
ipmmu_vip1: iommu at eef40000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeef40000 0 0x20000>;
renesas,ipmmu-main = <&ipmmu_mm 11>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
@@ -2180,7 +2193,8 @@ ipmmu_vip1: iommu at eef40000 {
};
ipmmu_mm: iommu at eefc0000 {
- compatible = "renesas,ipmmu-r8a779a0";
+ compatible = "renesas,ipmmu-r8a779a0",
+ "renesas,rcar-gen4-ipmmu";
reg = <0 0xeefc0000 0 0x20000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
--
2.25.1
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