[PATCH v13 2/2] arm64: dts: Add mediatek SoC mt8195 and evaluation board

[Tinghan Shen]

On Thu, 2022-03-31 at 15:29 +0800, Chunfeng Yun wrote:
> On Wed, 2022-03-30 at 17:45 +0800, Tinghan Shen wrote:
> > Add basic chip support for mediatek mt8195.
> > 
> > Signed-off-by: Seiya Wang <seiya.wang at mediatek.com>
> > Signed-off-by: Tinghan Shen <tinghan.shen at mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno at collabora.com>
> > ---
> >  arch/arm64/boot/dts/mediatek/Makefile       |    1 +
> >  arch/arm64/boot/dts/mediatek/mt8195-evb.dts |  173 +++
> >  arch/arm64/boot/dts/mediatek/mt8195.dtsi    | 1045
> > +++++++++++++++++++
> >  3 files changed, 1219 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> >  create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/Makefile
> > b/arch/arm64/boot/dts/mediatek/Makefile
> > index 8c1e18032f9f..5da29e7223e4 100644
> > --- a/arch/arm64/boot/dts/mediatek/Makefile
> > +++ b/arch/arm64/boot/dts/mediatek/Makefile
> > @@ -38,4 +38,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-
> > sku0.dtb
> >  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
> >  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-pumpkin.dtb
> >  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
> > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb
> >  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> > b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> > new file mode 100644
> > index 000000000000..76b5aaad7263
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> > @@ -0,0 +1,173 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright (C) 2021 MediaTek Inc.
> > + * Author: Seiya Wang <seiya.wang at mediatek.com>
> > + */
> > +/dts-v1/;
> > +#include "mt8195.dtsi"
> > +
> > +/ {
> > +	model = "MediaTek MT8195 evaluation board";
> > +	compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
> > +
> > +	aliases {
> > +		serial0 = &uart0;
> > +	};
> > +
> > +	chosen {
> > +		stdout-path = "serial0:921600n8";
> > +	};
> > +
> > +	memory at 40000000 {
> > +		device_type = "memory";
> > +		reg = <0 0x40000000 0 0x80000000>;
> > +	};
> > +};
> > +
> > +&auxadc {
> > +	status = "okay";
> > +};
> > +
> > +&i2c0 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&i2c0_pin>;
> > +	clock-frequency = <100000>;
> > +	status = "okay";
> > +};
> > +
> > +&i2c1 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&i2c1_pin>;
> > +	clock-frequency = <400000>;
> > +	status = "okay";
> > +};
> > +
> > +&i2c4 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&i2c4_pin>;
> > +	clock-frequency = <400000>;
> > +	status = "okay";
> > +};
> > +
> > +&i2c6 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&i2c6_pin>;
> > +	clock-frequency = <400000>;
> > +	status = "okay";
> > +};
> > +
> > +&nor_flash {
> > +	status = "okay";
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&nor_pins_default>;
> > +
> > +	flash at 0 {
> > +		compatible = "jedec,spi-nor";
> > +		reg = <0>;
> > +		spi-max-frequency = <50000000>;
> > +	};
> > +};
> > +
> > +&pio {
> > +	i2c0_pin: i2c0-pins {
> > +		pins {
> > +			pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
> > +				 <PINMUX_GPIO9__FUNC_SCL0>;
> > +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
> > +			mediatek,drive-strength-adv = <0>;
> > +			drive-strength = <6>;
> > +		};
> > +	};
> > +
> > +	i2c1_pin: i2c1-pins {
> > +		pins {
> > +			pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
> > +				 <PINMUX_GPIO11__FUNC_SCL1>;
> > +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
> > +			mediatek,drive-strength-adv = <0>;
> > +			drive-strength = <6>;
> > +		};
> > +	};
> > +
> > +	i2c4_pin: i2c4-pins {
> > +		pins {
> > +			pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
> > +				 <PINMUX_GPIO17__FUNC_SCL4>;
> > +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
> > +			mediatek,drive-strength-adv = <7>;
> > +		};
> > +	};
> > +
> > +	i2c6_pin: i2c6-pins {
> > +		pins {
> > +			pinmux = <PINMUX_GPIO25__FUNC_SDA6>,
> > +				 <PINMUX_GPIO26__FUNC_SCL6>;
> > +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
> > +		};
> > +	};
> > +
> > +	i2c7_pin: i2c7-pins {
> > +		pins {
> > +			pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
> > +				 <PINMUX_GPIO28__FUNC_SDA7>;
> > +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
> > +		};
> > +	};
> > +
> > +	nor_pins_default: nor-pins {
> > +		pins0 {
> > +			pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
> > +				 <PINMUX_GPIO141__FUNC_SPINOR_CK>,
> > +				 <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
> > +			bias-pull-down;
> > +		};
> > +
> > +		pins1 {
> > +			pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>,
> > +				 <PINMUX_GPIO130__FUNC_SPINOR_IO2>,
> > +				 <PINMUX_GPIO131__FUNC_SPINOR_IO3>;
> > +			bias-pull-up;
> > +		};
> > +	};
> > +
> > +	uart0_pin: uart0-pins {
> > +		pins {
> > +			pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,
> > +				 <PINMUX_GPIO99__FUNC_URXD0>;
> > +		};
> > +	};
> > +};
> > +
> > +&u3phy0 {
> > +	status="okay";
> > +};
> > +
> > +&u3phy1 {
> > +	status="okay";
> > +};
> 
> Seems forget to enable &phy2/3? due to xhci2/3 are enabled below

Ok, I'll add them at next version.
Thank you.

Best regards,
Tinghan

> 
> > +
> > +&uart0 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&uart0_pin>;
> > +	status = "okay";
> > +};
> > +
> > +&xhci0 {
> > +	status = "okay";
> > +};
> > +
> > +&xhci1 {
> > +	status = "okay";
> > +};
> > +
> > +&xhci2 {
> > +	status = "okay";
> > +};
> > +
> > +&xhci3 {
> > +	/* This controller is connected with a BT device.
> > +	 * Disable usb2 lpm to prevent known issues.
> > +	 */
> > +	usb2-lpm-disable;
> > +	status = "okay";
> > +};
> > 
> 
> [skip]
>