[PATCH 1/9] dt-bindings: soc: apple: Add Apple SART

Rob Herring robh at kernel.org
Thu Mar 31 14:23:05 PDT 2022


On Mon, Mar 21, 2022 at 05:50:41PM +0100, Sven Peter wrote:
> Apple SoCs such as the M1 come with a simple DMA address filter called
> SART. Unlike a real IOMMU no pagetables can be configured but instead
> DMA transactions can be allowed for up to 16 paddr regions.
> 
> Signed-off-by: Sven Peter <sven at svenpeter.dev>
> ---
>  .../bindings/soc/apple/apple,sart.yaml        | 52 +++++++++++++++++++

Close enough to an IOMMU in terms of its purpose, so put in 
bindings/iommu/

>  MAINTAINERS                                   |  1 +
>  2 files changed, 53 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/apple/apple,sart.yaml
> 
> diff --git a/Documentation/devicetree/bindings/soc/apple/apple,sart.yaml b/Documentation/devicetree/bindings/soc/apple/apple,sart.yaml
> new file mode 100644
> index 000000000000..d8177b3a3fba
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/apple/apple,sart.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/apple/apple,sart.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Apple SART DMA address filter
> +
> +maintainers:
> +  - Sven Peter <sven at svenpeter.dev>
> +
> +description:
> +  Apple SART is a simple address filter for DMA transactions. Regions of
> +  physical memory must be added to the SART's allow list before any
> +  DMA can target these. Unlike a proper IOMMU no remapping can be done and
> +  special support in the consumer driver is required since not all DMA
> +  transactions of a single device are subject to SART filtering.
> +
> +  SART1 has first been used since at least the A11 (iPhone 8 and iPhone X)
> +  and allows 36 bit of physical address space and filter entries with sizes
> +  up to 24 bit.
> +
> +  SART2, first seen in A14 and M1, allows 36 bit of physical address space
> +  and filter entry size up to 36 bit.
> +
> +  SART3, first seen in M1 Pro/Max, extends both the address space and filter
> +  entry size to 42 bit.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - apple,t6000-sart
> +      - apple,t8103-sart
> +
> +  reg:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    sart at 7bc50000 {
> +      compatible = "apple,t8103-sart";
> +      reg = <0x7bc50000 0x4000>;
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index cd0f68d4a34a..027c3b4ad61c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1774,6 +1774,7 @@ F:	Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml
>  F:	Documentation/devicetree/bindings/pci/apple,pcie.yaml
>  F:	Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
>  F:	Documentation/devicetree/bindings/power/apple*
> +F:	Documentation/devicetree/bindings/soc/apple/*
>  F:	Documentation/devicetree/bindings/watchdog/apple,wdt.yaml
>  F:	arch/arm64/boot/dts/apple/
>  F:	drivers/i2c/busses/i2c-pasemi-core.c
> -- 
> 2.25.1
> 
> 



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