[PATCH v3 09/10] arch: arm: boot: dts: Introduce HPE GXP Device tree

[Hawkins, Nick]

-----Original Message-----
From: Arnd Bergmann [mailto:arnd at arndb.de] 
Sent: Tuesday, March 29, 2022 4:13 PM
To: Hawkins, Nick <nick.hawkins at hpe.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski at canonical.com>; Verdun, Jean-Marie <verdun at hpe.com>; Arnd Bergmann <arnd at arndb.de>; Olof Johansson <olof at lixom.net>; soc at kernel.org; Rob Herring <robh+dt at kernel.org>; linux-arm-kernel at lists.infradead.org; devicetree at vger.kernel.org; linux-kernel at vger.kernel.org
Subject: Re: [PATCH v3 09/10] arch: arm: boot: dts: Introduce HPE GXP Device tree

On Tue, Mar 29, 2022 at 9:38 PM Hawkins, Nick <nick.hawkins at hpe.com>> wrote:

>> I am in the process of rewriting the timer driver for Linux but have hit a dilemma and I am looking for some direction. The registers that represent the watchdog timer, and timer all lay in the same register region and they are spread out to the point where there are other controls  in the same area.
>
>> For instance with our watchdog controls we have:
>
>> @90 the countdown value
>> @96 the configuration
>
>> And for our timer we have:
>> @80 the countdown value
>> @94 the configuration
>> @88 this is actually our timestamp register but is being included in with the timer driver currently to call clocksource_mmio_init.
>
>> What would be your recommendation for this? I was considering creating a gxp-clock that specifically points at the timestamp register but I still have the issue with gxp-timer and gxp-wdt being spread across the same area of registers.

> I think this is most commonly done using a 'syscon' node, have a look at the files listed by


> $ git grep syscon drivers/watchdog/ drivers/clocksource/

Is this a good example of what you were thinking of? I found this in arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi

sysctrl at 61840000 {
                        compatible = "socionext,uniphier-ld11-sysctrl",
                                     "simple-mfd", "syscon";
                        reg = <0x61840000 0x10000>;

                        sys_clk: clock {
                                compatible = "socionext,uniphier-ld11-clock";
                                #clock-cells = <1>;
                        };

                        sys_rst: reset {
                                compatible = "socionext,uniphier-ld11-reset";
                                #reset-cells = <1>;
                        };

                        watchdog {
                                compatible = "socionext,uniphier-wdt";
                        };
 };

If that is the case..

timectrl at 80 {
	compatible = "hpe,gxp-timectrl","syscon";
	reg = <0x80 0x16>;

	watchdog0: watchdog {
		compatible = "hpe,gxp-wdt";
	}

	timer0: timer {
		compatible = "hpe,gxp-timer";
	}
}
	

> You may also want to look at those drivers to find if any of them can be directly reused, this is perhaps a licensed IP block that others are using as well.

I will look and see if any of them have the same register sets and functionality.

Thanks,

-Nick Hawkins