[PATCH v4 03/22] arm64: dts: mt8192: Add gce node

[Nícolas F. R. A. Prado]

On Wed, Mar 23, 2022 at 06:24:03PM +0100, Matthias Brugger wrote:
> 
> 
> On 18/03/2022 15:45, Allen-KH Cheng wrote:
> > Add gce node for mt8192 SoC.
> > 
> > Signed-off-by: Allen-KH Cheng <allen-kh.cheng at mediatek.com>
> > Reviewed-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> > ---
> >   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 ++++++++++
> >   1 file changed, 10 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > index 0f9f211ca986..9e1b563bebab 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > @@ -6,6 +6,7 @@
> >   /dts-v1/;
> >   #include <dt-bindings/clock/mt8192-clk.h>
> > +#include <dt-bindings/gce/mt8192-gce.h>
> >   #include <dt-bindings/interrupt-controller/arm-gic.h>
> >   #include <dt-bindings/interrupt-controller/irq.h>
> >   #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
> > @@ -552,6 +553,15 @@
> >   			#size-cells = <0>;
> >   		};
> > +		gce: mailbox at 10228000 {
> > +			compatible = "mediatek,mt8192-gce";
> > +			reg = <0 0x10228000 0 0x4000>;
> > +			interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
> > +			#mbox-cells = <3>;
> 
> #mbox-cells should be 2, right?

It should indeed. The mboxes property in patch 21 should also have the third
argument ("1") dropped.

Thanks,
Nícolas