[PATCH 3/3] KVM: arm64: Start trapping ID registers for 32 bit guests

[Oliver Upton]

On Mon, Mar 28, 2022 at 6:13 PM Oliver Upton <oupton at google.com> wrote:
>
> To date KVM has not trapped ID register accesses from AArch32, meaning
> that guests get an unconstrained view of what hardware supports. This
> can be a serious problem because we try to base the guest's feature
> registers on values that are safe system-wide. Furthermore, KVM does not
> implement the latest ISA in the PMU and Debug architecture, so we
> constrain these fields to supported values.
>
> Since KVM now correctly handles CP15 and CP10 register traps, we no
> longer need to clear HCR_EL2.TID3 for 32 bit guests and will instead
> emulate reads with their safe values.
>
> Signed-off-by: Oliver Upton <oupton at google.com>
> ---
>  arch/arm64/include/asm/kvm_emulate.h | 8 --------
>  1 file changed, 8 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
> index d62405ce3e6d..fe32b4c8b35b 100644
> --- a/arch/arm64/include/asm/kvm_emulate.h
> +++ b/arch/arm64/include/asm/kvm_emulate.h
> @@ -75,14 +75,6 @@ static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
>         if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features))
>                 vcpu->arch.hcr_el2 &= ~HCR_RW;
>
> -       /*
> -        * TID3: trap feature register accesses that we virtualise.
> -        * For now this is conditional, since no AArch32 feature regs
> -        * are currently virtualised.
> -        */
> -       if (!vcpu_el1_is_32bit(vcpu))
> -               vcpu->arch.hcr_el2 |= HCR_TID3;
> -

This is obviously wrong. I deleted one too many lines! Will retest and
resend, this time hopefully with register reads _actually_ being
emulated :)