[PATCH] arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi
Lucas Stach
l.stach at pengutronix.de
Mon Mar 28 03:50:36 PDT 2022
Am Montag, dem 28.03.2022 um 12:22 +0200 schrieb Lucas Stach:
> Hi Shawn,
>
> it seems this patch has fallen through the cracks (maybe because no one
> cared enough to send a ack or review?).
Sorry for the noise, I was looking at the wrong branch. This patch is
already applied.
>
> Regards,
> Lucas
>
> Am Montag, dem 13.12.2021 um 21:40 +0100 schrieb Lucas Stach:
> > The base i.MX8MM dtsi changes the audio PLL2 rate, which gets in the
> > way if it should be used for anything else than audio. As this PLL doesn't
> > seem to be used by any upstream supported board, just remove the rate
> > configuration to allow boards to set it up as they wish.
> >
> > Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++----
> > 1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index c2f3f118f82e..844114eb45f0 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -591,8 +591,7 @@ clk: clock-controller at 30380000 {
> > <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
> > <&clk IMX8MM_SYS_PLL3>,
> > <&clk IMX8MM_VIDEO_PLL1>,
> > - <&clk IMX8MM_AUDIO_PLL1>,
> > - <&clk IMX8MM_AUDIO_PLL2>;
> > + <&clk IMX8MM_AUDIO_PLL1>;
> > assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>,
> > <&clk IMX8MM_ARM_PLL_OUT>,
> > <&clk IMX8MM_SYS_PLL3_OUT>,
> > @@ -602,8 +601,7 @@ clk: clock-controller at 30380000 {
> > <400000000>,
> > <750000000>,
> > <594000000>,
> > - <393216000>,
> > - <361267200>;
> > + <393216000>;
> > };
> >
> > src: reset-controller at 30390000 {
>
>
>
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