[PATCH v3 0/2] perf: arm-spe: Decode SPE source and use for perf c2c

[Ali Saidi]

When synthesizing data from SPE, augment the type with source information
for Arm Neoverse cores so we can detect situtions like cache line contention
and transfers on Arm platforms. 

This changes enables the expected behavior of perf c2c on a system with SPE where
lines that are shared among multiple cores show up in perf c2c output. 

These changes switch to use mem_lvl_num to encode the level information instead
of mem_lvl which is being deprecated, but I haven't found other users of
mem_lvl_num. 

Changes in v3:
  * Assume ther are only three levels of cache hierarchy
  * Split the mem_lvl_num and HITM changes in c2c into two seperate patches

Ali Saidi (3):
  perf arm-spe: Use SPE data source for neoverse cores
  perf mem: Support mem_lvl_num in c2c command
  perf mem: Support HITM for when mem_lvl_num is any

 .../util/arm-spe-decoder/arm-spe-decoder.c    |   1 +
 .../util/arm-spe-decoder/arm-spe-decoder.h    |  12 ++
 tools/perf/util/arm-spe.c                     | 109 +++++++++++++++---
 tools/perf/util/mem-events.c                  |  20 +++-
 4 files changed, 124 insertions(+), 18 deletions(-)

-- 
2.32.0