[PATCH] ARM: fix co-processor register typo

[Catalin Marinas]

On Wed, Mar 09, 2022 at 07:08:42PM +0000, Russell King wrote:
> In the recent Spectre BHB patches, there was a typo that is only
> exposed in certain configurations: mcr p15,0,XX,c7,r5,4 should have
> been mcr p15,0,XX,c7,c5,4
> 
> Reported-by: kernel test robot <lkp at intel.com>
> Fixes: b9baf5c8c5c3 ("ARM: Spectre-BHB workaround")
> Signed-off-by: Russell King (Oracle) <rmk+kernel at armlinux.org.uk>
> ---
>  arch/arm/include/asm/assembler.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
> index cc8851e09f0d..34fe8d2dd5d1 100644
> --- a/arch/arm/include/asm/assembler.h
> +++ b/arch/arm/include/asm/assembler.h
> @@ -117,7 +117,7 @@ THUMB(	fpreg	.req	r7	)
>  	.endm
>  
>  	.macro	isb, args
> -	mcr	p15, 0, r0, c7, r5, 4
> +	mcr	p15, 0, r0, c7, c5, 4
>  	.endm
>  #endif

Acked-by: Catalin Marinas <catalin.marinas at arm.com>