[PATCH 0/2] pwm: brcmstb: Some cleanups

[Uwe Kleine-König]

Hello Florian,

I have a few questions here looking in more detail into the brcmstb
driver:

 - What happens on PWM_ON(channel) = 0?
   I guess it just emits a flat inactive line, and refusing a small
   duty_cycle that results in PWM_ON(channel) = 0 is just artificial?

 - There is a line describing:

   	W = cword, if cword < 2 ^ 15 else 16-bit 2's complement of cword

   The driver only considers powers of two <= 2^15 for cword. Is the
   implementation just lazy, or is the comment misleading?
   At least s/</<=/ ?
   There is no sense in using a value > 2^15 as for each such value
   there is a smaller value with the same result, right?

 - clk_get_rate(p->clk) is expected to return 27 MHz, right?
   (Just for my understanding, not about to hardcode this in the code)

 - The explanation about period in the comment is:

   	The period is: (period + 1) / Fv

   so I would have expected:

   	pc = (period_ns * clkrate * cword / (NSEC_PER_SEC << 16)) - 1

   (assuming no overflows). However the -1 isn't in the code.

 - Duty-cycle calculation is unclear, the docs say:

 	"on" time is on / (period + 1)

   I suspect on time is $on / Fv though?
   But even with that I don't understand the +1 in

 	dc = mul_u64_u64_div_u64(duty_ns + 1, rate, NSEC_PER_SEC);

Can you enlighten me?

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |
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