[PATCH 2/2] ARM: entry: avoid explicit literal loads

[Linus Walleij]

On Tue, Mar 1, 2022 at 1:04 PM Ard Biesheuvel <ardb at kernel.org> wrote:

> ARMv7 has MOVW/MOVT instruction pairs to load symbol addresses into
> registers without having to rely on literal loads that go via the
> D-cache.  For older cores, we now support a similar arrangement, based
> on PC-relative group relocations.
>
> This means we can elide most literal loads entirely from the entry path,
> by switching to the ldr_va macro to emit the appropriate sequence
> depending on the target architecture revision.
>
> While at it, switch to the bl_r macro for invoking the right PABT/DABT
> helpers instead of setting the LR register explicitly, which does not
> play well with cores that speculate across function returns.
>
> Signed-off-by: Ard Biesheuvel <ardb at kernel.org>

After reading the previous patch and figuring out ldr_va this was
easier to understand. I guess I'd like some docs around ldr_va
ultimately (I only think the top level macros warrant some docs,
not say __prefixed inner macros), though offset is quite intuitive
anyway the patch makes the kernel a much better place and it's
a real beauty so:
Reviewed-by: Linus Walleij <linus.walleij at linaro.org>

Yours,
Linus Walleij