[PATCH] arm64: dts: n5x: add sdr edac support

Dinh Nguyen dinguyen at kernel.org
Tue Mar 1 07:12:38 PST 2022


The N5X platform has the Synopsys DDR controller the includes an EDAC
controller. Add the entry for the controller in the DTS file instead of
the base Agilex DTSI because the base Agilex does not have the
controller.

Signed-off-by: Dinh Nguyen <dinguyen at kernel.org>
---
 arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
index f3c1310dae0a..628c9943914b 100644
--- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
@@ -23,6 +23,16 @@ memory {
 		/* We expect the bootloader to fill in the reg */
 		reg = <0 0 0 0>;
 	};
+
+	soc {
+		sdram_edac: sdr_edac at f87f8000 {
+			compatible = "snps,ddrc-3.80a";
+			reg = <0xf87f8000 0x400>;
+			interrupts = <0 175 4>;
+			intel,sysmgr-syscon = <&sysmgr 0xb8>;
+			status = "okay";
+		};
+	};
 };
 
 &clkmgr {
-- 
2.25.1




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