[PATCH v5 09/19] arch_topology: Use the last level cache information from the cacheinfo

[Conor.Dooley at microchip.com]

On 30/06/2022 21:21, Sudeep Holla wrote:
> On Thu, Jun 30, 2022 at 08:13:55PM +0000, Conor.Dooley at microchip.com wrote:
>>
>> I didn't have the time to go digging into things, but the following
>> macro looked odd:
>> #define per_cpu_cacheinfo_idx(cpu, idx)		\
>> 				(per_cpu_cacheinfo(cpu) + (idx))
>> Maybe it is just badly named, but is this getting the per_cpu_cacheinfo
>> and then incrementing intentionally, or is it meant to get the
>> per_cpu_cacheinfo of cpu + idx?
> 
> OK, basically per_cpu_cacheinfo(cpu) get the information for a cpu
> while per_cpu_cacheinfo_idx(cpu, idx) will fetch the information for a
> given cpu and given index within the cpu. So we are incrementing the
> pointer by the index. These work just fine on arm64 platform.

Right, that's what I figured but wanted to be sure.

> 
> Not sure if compiler is optimising something as I still can't understand
> how we can end up with valid llc but fw_token as NULL.
See idk about that. The following fails to boot.
index 167abfa6f37d..9d45c37fb004 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -36,6 +36,8 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
 static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
                                           struct cacheinfo *sib_leaf)
 {
+       if (!this_leaf || !sib_leaf)
+               return false;
        /*
         * For non DT/ACPI systems, assume unique level 1 caches,
         * system-wide shared caches for all other levels. This will be used
@@ -74,8 +76,12 @@ bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
 
        llc_x = per_cpu_cacheinfo_idx(cpu_x, cache_leaves(cpu_x) - 1);
        llc_y = per_cpu_cacheinfo_idx(cpu_y, cache_leaves(cpu_y) - 1);
+       if (!llc_x || !llc_y){
+               printk("llc was null\n");
+               return false;
+       }
 
-       return cache_leaves_are_shared(llc_x, llc_y);
+       return false; //cache_leaves_are_shared(llc_x, llc_y);
 }
 
 #ifdef CONFIG_OF

and this boots:

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 167abfa6f37d..01900908fe31 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -36,6 +36,8 @@ struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
 static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
                                           struct cacheinfo *sib_leaf)
 {
+       if (!this_leaf || !sib_leaf)
+               return false;
        /*
         * For non DT/ACPI systems, assume unique level 1 caches,
         * system-wide shared caches for all other levels. This will be used
@@ -75,7 +77,7 @@ bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
        llc_x = per_cpu_cacheinfo_idx(cpu_x, cache_leaves(cpu_x) - 1);
        llc_y = per_cpu_cacheinfo_idx(cpu_y, cache_leaves(cpu_y) - 1);
 
-       return cache_leaves_are_shared(llc_x, llc_y);
+       return false; //cache_leaves_are_shared(llc_x, llc_y);
 }
 
 #ifdef CONFIG_OF