Patch "crypto: arm/sha512-neon - avoid ADRL pseudo instruction" has been added to the 5.4-stable tree

[gregkh at linuxfoundation.org]

This is a note to let you know that I've just added the patch titled

    crypto: arm/sha512-neon - avoid ADRL pseudo instruction

to the 5.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     crypto-arm-sha512-neon-avoid-adrl-pseudo-instruction.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable at vger.kernel.org> know about it.


>From foo at baz Thu Jun 30 03:27:07 PM CEST 2022
From: Florian Fainelli <f.fainelli at gmail.com>
Date: Wed, 29 Jun 2022 11:02:21 -0700
Subject: crypto: arm/sha512-neon - avoid ADRL pseudo instruction
To: stable at vger.kernel.org
Cc: Ard Biesheuvel <ardb at kernel.org>, Nick Desaulniers <ndesaulniers at google.com>, Herbert Xu <herbert at gondor.apana.org.au>, Florian Fainelli <f.fainelli at gmail.com>, Russell King <linux at armlinux.org.uk>, "David S. Miller" <davem at davemloft.net>, Tony Lindgren <tony at atomide.com>, Hans Ulli Kroll <ulli.kroll at googlemail.com>, Stefan Agner <stefan at agner.ch>, Nicolas Pitre <nico at fluxnic.net>, Andre Przywara <andre.przywara at arm.com>, "Russell King (Oracle)" <rmk+kernel at armlinux.org.uk>, Greg Kroah-Hartman <gregkh at linuxfoundation.org>, Catalin Marinas <catalin.marinas at arm.com>, Jian Cai <caij2003 at gmail.com>, linux-arm-kernel at lists.infradead.org (moderated list:ARM PORT), linux-kernel at vger.kernel.org (open list), linux-crypto at vger.kernel.org (open list:CRYPTO API), linux-omap at vger.kernel.org (open list:OMAP2+ SUPPORT), clang-built-linux at googlegroups.com (open list:CLANG/LLVM BUILD SUPPORT), Sasha Levin <sashal at kernel.org>
Message-ID: <20220629180227.3408104-6-f.fainelli at gmail.com>

From: Ard Biesheuvel <ardb at kernel.org>

commit 0f5e8323777bfc1c1d2cba71242db6a361de03b6 upstream

The ADRL pseudo instruction is not an architectural construct, but a
convenience macro that was supported by the ARM proprietary assembler
and adopted by binutils GAS as well, but only when assembling in 32-bit
ARM mode. Therefore, it can only be used in assembler code that is known
to assemble in ARM mode only, but as it turns out, the Clang assembler
does not implement ADRL at all, and so it is better to get rid of it
entirely.

So replace the ADRL instruction with a ADR instruction that refers to
a nearer symbol, and apply the delta explicitly using an additional
instruction.

Signed-off-by: Ard Biesheuvel <ardb at kernel.org>
Tested-by: Nick Desaulniers <ndesaulniers at google.com>
Signed-off-by: Herbert Xu <herbert at gondor.apana.org.au>
Signed-off-by: Florian Fainelli <f.fainelli at gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
---
 arch/arm/crypto/sha512-armv4.pl       |    4 ++--
 arch/arm/crypto/sha512-core.S_shipped |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

--- a/arch/arm/crypto/sha512-armv4.pl
+++ b/arch/arm/crypto/sha512-armv4.pl
@@ -212,7 +212,6 @@ $code=<<___;
 #else
 .syntax unified
 # ifdef __thumb2__
-#  define adrl adr
 .thumb
 # else
 .code   32
@@ -602,7 +601,8 @@ sha512_block_data_order_neon:
 	dmb				@ errata #451034 on early Cortex A8
 	add	$len,$inp,$len,lsl#7	@ len to point at the end of inp
 	VFP_ABI_PUSH
-	adrl	$Ktbl,K512
+	adr	$Ktbl,.Lsha512_block_data_order
+	sub	$Ktbl,$Ktbl,.Lsha512_block_data_order-K512
 	vldmia	$ctx,{$A-$H}		@ load context
 .Loop_neon:
 ___
--- a/arch/arm/crypto/sha512-core.S_shipped
+++ b/arch/arm/crypto/sha512-core.S_shipped
@@ -79,7 +79,6 @@
 #else
 .syntax unified
 # ifdef __thumb2__
-#  define adrl adr
 .thumb
 # else
 .code   32
@@ -543,7 +542,8 @@ sha512_block_data_order_neon:
 	dmb				@ errata #451034 on early Cortex A8
 	add	r2,r1,r2,lsl#7	@ len to point at the end of inp
 	VFP_ABI_PUSH
-	adrl	r3,K512
+	adr	r3,.Lsha512_block_data_order
+	sub	r3,r3,.Lsha512_block_data_order-K512
 	vldmia	r0,{d16-d23}		@ load context
 .Loop_neon:
 	vshr.u64	d24,d20,#14	@ 0


Patches currently in stable-queue which might be from f.fainelli at gmail.com are

queue-5.4/arm-8971-1-replace-the-sole-use-of-a-symbol-with-its-definition.patch
queue-5.4/arm-omap2-drop-unnecessary-adrl.patch
queue-5.4/arm-8933-1-replace-sun-solaris-style-flag-on-section-directive.patch
queue-5.4/crypto-arm-sha256-neon-avoid-adrl-pseudo-instruction.patch
queue-5.4/arm-9029-1-make-iwmmxt.s-support-clang-s-integrated-assembler.patch
queue-5.4/net-mscc-ocelot-allow-unregistered-ip-multicast-flooding.patch
queue-5.4/crypto-arm-sha512-neon-avoid-adrl-pseudo-instruction.patch
queue-5.4/arm-8989-1-use-.fpu-assembler-directives-instead-of-assembler-arguments.patch
queue-5.4/crypto-arm-ghash-ce-define-fpu-before-fpu-registers-are-referenced.patch
queue-5.4/arm-8929-1-use-apsr_nzcv-instead-of-r15-as-mrc-operand.patch
queue-5.4/crypto-arm-use-kconfig-based-compiler-checks-for-crypto-opcodes.patch
queue-5.4/arm-8990-1-use-vfp-assembler-mnemonics-in-register-load-store-macros.patch