[PATCH v5 1/4] dt-bindings: interconnect: qcom,msm8998-cpu-bwmon: add BWMON device
Krzysztof Kozlowski
krzysztof.kozlowski at linaro.org
Wed Jun 29 00:52:47 PDT 2022
Add bindings for the Qualcomm Bandwidth Monitor device providing
performance data on interconnects. The bindings describe only BWMON CPU
(version 4), e.g. the instance which appeared for the first on Qualcomm
MSM8998 SoC and is also used on SDM845. This BWMON device sits between
CPU and Last Level Cache Controller.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
Reviewed-by: Rob Herring <robh at kernel.org>
Acked-by: Georgi Djakov <djakov at kernel.org>
---
.../interconnect/qcom,msm8998-cpu-bwmon.yaml | 80 +++++++++++++++++++
1 file changed, 80 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml
new file mode 100644
index 000000000000..b6ced53b92f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-cpu-bwmon.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-cpu-bwmon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Interconnect Bandwidth Monitor
+
+maintainers:
+ - Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
+
+description:
+ Bandwidth Monitor measures current throughput on buses between various NoC
+ fabrics and provides information when it crosses configured thresholds.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - qcom,sdm845-cpu-bwmon
+ - const: qcom,msm8998-cpu-bwmon
+ - const: qcom,msm8998-cpu-bwmon # BWMON v4
+
+ interconnects:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ operating-points-v2: true
+ opp-table: true
+
+ reg:
+ # Currently described BWMON v4 and v5 use one register address space.
+ # BWMON v2 uses two register spaces - not yet described.
+ maxItems: 1
+
+required:
+ - compatible
+ - interconnects
+ - interrupts
+ - operating-points-v2
+ - opp-table
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interconnect/qcom,sdm845.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ pmu at 1436400 {
+ compatible = "qcom,sdm845-cpu-bwmon", "qcom,msm8998-cpu-bwmon";
+ reg = <0x01436400 0x600>;
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
+
+ operating-points-v2 = <&cpu_bwmon_opp_table>;
+
+ cpu_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+ opp-0 {
+ opp-peak-kBps = <4800000>;
+ };
+ opp-1 {
+ opp-peak-kBps = <9216000>;
+ };
+ opp-2 {
+ opp-peak-kBps = <15052800>;
+ };
+ opp-3 {
+ opp-peak-kBps = <20889600>;
+ };
+ opp-4 {
+ opp-peak-kBps = <25497600>;
+ };
+ };
+ };
--
2.34.1
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