[PATCH v8 3/3] PCI: qcom: Add IPQ60xx support

[Johan Hovold]

On Tue, Jun 21, 2022 at 11:54:54AM +0300, Baruch Siach wrote:
> From: Selvam Sathappan Periakaruppan <quic_speriaka at quicinc.com>
> 
> IPQ60xx series of SoCs have one port of PCIe gen 3. Add support for that
> platform.
> 
> The code is based on downstream[1] Codeaurora kernel v5.4 (branch
> win.linuxopenwrt.2.0).
> 
> Split out the DBI registers access part from .init into .post_init. DBI
> registers are only accessible after phy_power_on().
> 
> [1] https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-ipq-5.4/
> 
> Reviewed-by: Rob Herring <robh at kernel.org>
> Acked-by: Stanimir Varbanov <svarbanov at mm-sol.com>
> Tested-by: Robert Marko <robert.marko at sartura.hr>
> Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka at quicinc.com>
> Signed-off-by: Baruch Siach <baruch.siach at siklu.com>

Reviewed-by: Johan Hovold <johan+linaro at kernel.org>

Johan