[PATCH] clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's parent

[Stephen Boyd]

Quoting AngeloGioacchino Del Regno (2022-06-16 01:48:44)
> Il 16/06/22 04:44, Stephen Boyd ha scritto:
> > Quoting AngeloGioacchino Del Regno (2022-06-14 02:10:20)
> >> Add the CLK_SET_RATE_PARENT flag to the CLK_VDO0_DP_INTF0_DP_INTF
> >> clock: this is required to trigger clock source selection on
> >> CLK_TOP_EDP, while avoiding to manage the enablement of the former
> >> separately from the latter in the displayport driver.
> >>
> >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> >> ---
> > 
> > Any Fixes tag?
> 
> Backporting is useless because there's no DisplayPort driver that supports MT8195
> in the previous kernel versions, so this clock (and whatever logic behind it) is
> unused.
> 
> Though, if you think that's going to be useful in any way, I can add one?
> 

It's always useful. A Fixes tag doesn't mean anything for backporting to
stable kernels.