[PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC

[Rob Herring]

On Thu, Jun 09, 2022 at 08:50:54PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan at nxp.com>
> 
> Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
> resets and power gating for mixes.
> 
> Signed-off-by: Peng Fan <peng.fan at nxp.com>
> ---
>  .../bindings/power/fsl,imx93-src.yaml         | 96 +++++++++++++++++++
>  include/dt-bindings/power/fsl,imx93-power.h   | 11 +++
>  2 files changed, 107 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
>  create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
> 
> diff --git a/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> new file mode 100644
> index 000000000000..880500a841f7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> @@ -0,0 +1,96 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/fsl,imx93-src.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX93 System Reset Controller
> +
> +maintainers:
> +  - Peng Fan <peng.fan at nxp.com>
> +
> +description: |
> +  The System Reset Controller (SRC) is responsible for the generation of
> +  all the system reset signals and boot argument latching.
> +
> +  Its main functions are as follows,
> +  - Deals with all global system reset sources from other modules,
> +    and generates global system reset.
> +  - Responsible for power gating of MIXs (Slices) and their memory
> +    low power control.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: fsl,imx93-src
> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  slices:

power-controller

But if there aren't any other child nodes for the SRC, then why do you 
need this level at all? If there are others, then your binding is 
incomplete.

> +    type: object
> +    description: list of power domains provided by this controller.
> +
> +    properties:
> +      '#address-cells':
> +        const: 1
> +
> +      '#size-cells':
> +        const: 0
> +
> +    patternProperties:
> +      "power-domain@[0-9]$":
> +        $ref: /schemas/power/power-domain.yaml#
> +
> +        type: object
> +        properties:
> +          '#power-domain-cells':
> +            const: 0
> +
> +          reg:
> +            description: |
> +              Power domain index. Valid values are defined in
> +              include/dt-bindings/power/imx93-power.h for fsl,imx93-src
> +            maxItems: 1
> +
> +          clocks:
> +            description: |
> +              A number of phandles to clocks that need to be enabled
> +              during domain power-up sequencing to ensure reset
> +              propagation into devices located inside this power domain.
> +            minItems: 1
> +            maxItems: 5
> +
> +        required:
> +          - '#power-domain-cells'
> +          - reg
> +
> +required:
> +  - compatible
> +  - reg
> +  - slices
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/imx93-clock.h>
> +    #include <dt-bindings/power/fsl,imx93-power.h>
> +
> +    system-controller at 44460000 {
> +        compatible = "fsl,imx93-src", "syscon";
> +        reg = <0x44460000 0x10000>;
> +
> +        slices {
> +                #address-cells = <1>;
> +                #size-cells = <0>;
> +
> +                mediamix: power-domain at 0 {
> +                        reg = <IMX93_POWER_DOMAIN_MEDIAMIX>;
> +                        #power-domain-cells = <0>;
> +                        clocks = <&clk IMX93_CLK_MEDIA_AXI>,
> +                                 <&clk IMX93_CLK_MEDIA_APB>;
> +                };
> +        };
> +    };
> diff --git a/include/dt-bindings/power/fsl,imx93-power.h b/include/dt-bindings/power/fsl,imx93-power.h
> new file mode 100644
> index 000000000000..27fb7df80f93
> --- /dev/null
> +++ b/include/dt-bindings/power/fsl,imx93-power.h
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/*
> + *  Copyright 2022 NXP
> + */
> +
> +#ifndef __DT_BINDINGS_IMX93_POWER_H__
> +#define __DT_BINDINGS_IMX93_POWER_H__
> +
> +#define IMX93_POWER_DOMAIN_MEDIAMIX		0
> +
> +#endif
> -- 
> 2.25.1
> 
>