[PATCH v9 net-next 2/7] net: mdio: mscc-miim: add ability to be used in a non-mmio configuration
Andy Shevchenko
andy.shevchenko at gmail.com
Sat Jun 11 03:34:59 PDT 2022
On Fri, Jun 10, 2022 at 7:57 PM Colin Foster
<colin.foster at in-advantage.com> wrote:
>
> There are a few Ocelot chips that contain the logic for this bus, but are
> controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In
> the externally controlled configurations these registers are not
> memory-mapped.
>
> Add support for these non-memory-mapped configurations.
...
> + ocelot_platform_init_regmap_from_resource(pdev, 0, &mii_regmap, NULL,
> + &mscc_miim_regmap_config);
This is a bit non-standard, why not to follow the previously used API
design, i.e.
mii_regmap.map = ...
?
...
> + ocelot_platform_init_regmap_from_resource(pdev, 1, &phy_regmap, &res,
> + &mscc_miim_phy_regmap_config);
Ditto.
Also here is the question how '_from_' is aligned with '&res'. If
it's _from_ a resource then the resource is already a pointer.
...
> if (res) {
> - phy_regs = devm_ioremap_resource(dev, res);
> - if (IS_ERR(phy_regs)) {
> - dev_err(dev, "Unable to map internal phy registers\n");
> - return PTR_ERR(phy_regs);
> - }
> -
> - phy_regmap = devm_regmap_init_mmio(dev, phy_regs,
> - &mscc_miim_phy_regmap_config);
> if (IS_ERR(phy_regmap)) {
> dev_err(dev, "Unable to create phy register regmap\n");
> return PTR_ERR(phy_regmap);
> }
This looks weird. You check an error here instead of the API you
called. It's a weird design, the rationale of which is doubtful and
has to be at least explained.
> + } else {
> + phy_regmap = NULL;
> }
--
With Best Regards,
Andy Shevchenko
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