[PATCH] arm64: dts: imx8mp: Adjust PHY IRQ mode on i.MX8M Plus DHCOM

[Marek Vasut]

Set SION bit and clear ODE and DSE bits for PHY IRQ IOMUXC settings.
The SION bit is needed to pass pin state into the SoC, the later are
not needed as this is an input pin.

Fixes: 8d6712695bc8e ("arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK2")
Signed-off-by: Marek Vasut <marex at denx.de>
Cc: Fabio Estevam <festevam at denx.de>
Cc: NXP Linux Team <linux-imx at nxp.com>
Cc: Peng Fan <peng.fan at nxp.com>
Cc: Shawn Guo <shawnguo at kernel.org>
To: linux-arm-kernel at lists.infradead.org
---
 arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index 1f7218c253915..e3a13e494ca6f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -778,7 +778,7 @@ pinctrl_ethphy0: dhcom-ethphy0-grp {
 			/* ENET1_#RST Reset */
 			MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20		0x22
 			/* ENET1_#INT Interrupt */
-			MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19		0x22
+			MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19		0x40000000
 		>;
 	};
 
-- 
2.35.1